Module Name: src
Committed By: macallan
Date: Tue Dec 13 14:23:43 UTC 2011
Modified Files:
src/sys/arch/mips/mips: mips3_clockintr.c
Log Message:
add a hook to mips3_initclocks() to allow for time counters other than the
cp0 cycle counter
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/mips/mips3_clockintr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips3_clockintr.c
diff -u src/sys/arch/mips/mips/mips3_clockintr.c:1.12 src/sys/arch/mips/mips/mips3_clockintr.c:1.13
--- src/sys/arch/mips/mips/mips3_clockintr.c:1.12 Sun Jul 10 23:13:22 2011
+++ src/sys/arch/mips/mips/mips3_clockintr.c Tue Dec 13 14:23:43 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: mips3_clockintr.c,v 1.12 2011/07/10 23:13:22 matt Exp $ */
+/* $NetBSD: mips3_clockintr.c,v 1.13 2011/12/13 14:23:43 macallan Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips3_clockintr.c,v 1.12 2011/07/10 23:13:22 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips3_clockintr.c,v 1.13 2011/12/13 14:23:43 macallan Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -57,6 +57,11 @@ __KERNEL_RCSID(0, "$NetBSD: mips3_clocki
* responsible for blocking and renabling the interrupt in the
* cpu_intr() routine.
*/
+
+static void mips3_init_cp0_clocks(void);
+void (*initclocks_ptr)(void) = mips3_init_cp0_clocks;
+
+
void
mips3_clockintr(struct clockframe *cfp)
{
@@ -88,7 +93,6 @@ mips3_clockintr(struct clockframe *cfp)
*/
hardclock(cfp);
-
/* caller should renable clock interrupts */
}
@@ -96,8 +100,8 @@ mips3_clockintr(struct clockframe *cfp)
* Start the real-time and statistics clocks. Leave stathz 0 since there
* are no other timers available.
*/
-void
-mips3_initclocks(void)
+static void
+mips3_init_cp0_clocks(void)
{
struct cpu_info * const ci = curcpu();
@@ -106,6 +110,17 @@ mips3_initclocks(void)
mips3_init_tc();
+}
+
+void
+mips3_initclocks(void)
+{
+ if (initclocks_ptr != NULL) {
+ initclocks_ptr();
+ } else {
+ mips3_init_cp0_clocks();
+ }
+
/*
* Now we can enable all interrupts including hardclock(9)
* by CPU INT5.
