Module Name: src
Committed By: matt
Date: Thu Dec 15 04:52:59 UTC 2011
Modified Files:
src/sys/arch/evbmips/rmixl [matt-nb5-mips64]: machdep.c
Log Message:
Add earlycons support.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.37 -r1.1.2.38 src/sys/arch/evbmips/rmixl/machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbmips/rmixl/machdep.c
diff -u src/sys/arch/evbmips/rmixl/machdep.c:1.1.2.37 src/sys/arch/evbmips/rmixl/machdep.c:1.1.2.38
--- src/sys/arch/evbmips/rmixl/machdep.c:1.1.2.37 Sat Dec 3 01:56:55 2011
+++ src/sys/arch/evbmips/rmixl/machdep.c Thu Dec 15 04:52:59 2011
@@ -238,6 +238,42 @@ static void rmixl_wakeup_info_print(vola
#endif /* MULTIPROCESSOR */
static void rmixl_fixup_curcpu(void);
+#if NCOM > 0
+static volatile uint32_t *rmixl_com0addr;
+static int
+rmixl_cngetc(dev_t dv)
+{
+ volatile uint32_t * const com0addr = rmixl_com0addr;
+
+ if ((be32toh(com0addr[com_lsr]) & LSR_RXRDY) == 0)
+ return -1;
+
+ return be32toh(com0addr[com_data]) & 0xff;
+}
+
+static void
+rmixl_cnputc(dev_t dv, int c)
+{
+ volatile uint32_t * const com0addr = rmixl_com0addr;
+ int timo = 150000;
+
+ while ((be32toh(com0addr[com_lsr]) & LSR_TXRDY) == 0 && --timo > 0)
+ ;
+
+ com0addr[com_data] = htobe32(c);
+ __asm __volatile("sync");
+
+ while ((be32toh(com0addr[com_lsr]) & LSR_TSRE) == 0 && --timo > 0)
+ ;
+}
+
+struct consdev rmixl_earlycons = {
+ .cn_putc = rmixl_cnputc,
+ .cn_getc = rmixl_cngetc,
+ .cn_pollc = nullcnpollc,
+};
+#endif
+
/*
* Do all the stuff that locore normally does before calling main().
*/
@@ -265,6 +301,11 @@ mach_init(int argc, int32_t *argv, void
kernend = (void *)mips_round_page(end);
memset(edata, 0, (char *)kernend - edata);
+#if NCOM > 0
+ rmixl_com0addr = (void *)(vaddr_t)(RMIXL_IO_DEV_VBASE + comcnaddr);
+ cn_tab = &rmixl_earlycons; /* after clearing BSS, not before */
+#endif
+
/*
* Set up the exception vectors and CPU-specific function
* vectors early on. We need the wbflush() vector set up
