Module Name: src
Committed By: bsh
Date: Thu Apr 19 09:53:53 UTC 2012
Modified Files:
src/sys/arch/arm/imx: files.imx51
src/sys/arch/evbarm/conf: NETWALKER
Added Files:
src/sys/arch/arm/imx: imx51_esdhc.c
Log Message:
support SD/MMC on Netwalker.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx51_esdhc.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/evbarm/conf/NETWALKER
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.4 src/sys/arch/arm/imx/files.imx51:1.5
--- src/sys/arch/arm/imx/files.imx51:1.4 Tue Apr 17 10:19:57 2012
+++ src/sys/arch/arm/imx/files.imx51 Thu Apr 19 09:53:53 2012
@@ -1,4 +1,4 @@
-# $NetBSD: files.imx51,v 1.4 2012/04/17 10:19:57 bsh Exp $
+# $NetBSD: files.imx51,v 1.5 2012/04/19 09:53:53 bsh Exp $
#
# Configuration info for the Freescale i.MX51
#
@@ -87,8 +87,8 @@ file arch/arm/imx/imxusb.c imxehci
# file arch/arm/imx/wdc_axi.c wdc_axi
# SD host controller for SD/MMC
-# device imxmci: sdmmcbus
-# file arch/arm/imx/imx51_mci.c imxmci
+attach sdhc at axi with sdhc_axi
+file arch/arm/imx/imx51_esdhc.c sdhc_axi
# iic Controler
# device imxi2c: i2cbus
Index: src/sys/arch/evbarm/conf/NETWALKER
diff -u src/sys/arch/evbarm/conf/NETWALKER:1.11 src/sys/arch/evbarm/conf/NETWALKER:1.12
--- src/sys/arch/evbarm/conf/NETWALKER:1.11 Tue Apr 17 10:19:57 2012
+++ src/sys/arch/evbarm/conf/NETWALKER Thu Apr 19 09:53:53 2012
@@ -1,4 +1,4 @@
-# $NetBSD: NETWALKER,v 1.11 2012/04/17 10:19:57 bsh Exp $
+# $NetBSD: NETWALKER,v 1.12 2012/04/19 09:53:53 bsh Exp $
#
# NETWALKER -- http://www.sharp.co.jp/netwalker/
#
@@ -194,6 +194,14 @@ imxgpio1 at axi? addr 0x73f88000
imxgpio2 at axi? addr 0x73f8c000
imxgpio3 at axi? addr 0x73f90000
+# SD/MMC
+sdhc0 at axi? addr 0x70004000 irq 1 # eSDHC1
+#sdhc1 at axi? addr 0x70008000 irq 2 # eSDHC2
+sdmmc* at sdhc?
+ld* at sdmmc? # MMC/SD card
+#options SDHC_DEBUG
+#options SDMMC_DEBUG
+
# USB
imxusbc0 at axi? addr 0x73f80000
ehci0 at imxusbc0 unit 0 irq 18 # OTG
Added files:
Index: src/sys/arch/arm/imx/imx51_esdhc.c
diff -u /dev/null src/sys/arch/arm/imx/imx51_esdhc.c:1.1
--- /dev/null Thu Apr 19 09:53:54 2012
+++ src/sys/arch/arm/imx/imx51_esdhc.c Thu Apr 19 09:53:53 2012
@@ -0,0 +1,128 @@
+/* $NetBSD: imx51_esdhc.c,v 1.1 2012/04/19 09:53:53 bsh Exp $ */
+
+/*-
+ * Copyright (c) 2012 Genetec Corporation. All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: imx51_esdhc.c,v 1.1 2012/04/19 09:53:53 bsh Exp $");
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/pmf.h>
+
+#include <machine/intr.h>
+
+#include <dev/sdmmc/sdhcvar.h>
+#include <dev/sdmmc/sdmmcvar.h>
+
+#include <arm/imx/imx51reg.h>
+#include <arm/imx/imx51var.h>
+#include <arm/imx/imx51_ccmvar.h>
+
+struct sdhc_axi_softc {
+ struct sdhc_softc sc_sdhc;
+ /* we have only one slot */
+ struct sdhc_host *sc_hosts[1];
+
+ void *sc_ih;
+};
+
+static int sdhc_match(device_t, cfdata_t, void *);
+static void sdhc_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(sdhc_axi, sizeof(struct sdhc_axi_softc),
+ sdhc_match, sdhc_attach, NULL, NULL);
+
+static int
+sdhc_match(device_t parent, cfdata_t cf, void *aux)
+{
+
+ struct axi_attach_args *aa = aux;
+
+ switch (aa->aa_addr) {
+ case ESDHC1_BASE:
+ case ESDHC2_BASE:
+ return 1;
+ }
+
+ return 0;
+}
+
+static void
+sdhc_attach(device_t parent, device_t self, void *aux)
+{
+ struct sdhc_axi_softc *sc = device_private(self);
+ struct axi_attach_args *aa = aux;
+ bus_space_tag_t iot = aa->aa_iot;
+ bus_space_handle_t ioh;
+ u_int perclk;
+
+ sc->sc_sdhc.sc_dev = self;
+
+ sc->sc_sdhc.sc_dmat = aa->aa_dmat;
+
+ if (bus_space_map(iot, aa->aa_addr, ESDHC_SIZE, 0, &ioh)) {
+ aprint_error_dev(self, "can't map\n");
+ return;
+ }
+
+ aprint_normal(": SD/MMC host controller\n");
+ aprint_naive("\n");
+
+
+ sc->sc_sdhc.sc_host = sc->sc_hosts;
+ /* base clock frequency in kHz */
+ perclk = imx51_get_clock(IMX51CLK_PERCLK_ROOT);
+ sc->sc_sdhc.sc_clkbase = perclk / 1000;
+ sc->sc_sdhc.sc_flags |= SDHC_FLAG_HAVE_DVS |
+ SDHC_FLAG_NO_PWR0 |
+ SDHC_FLAG_32BIT_ACCESS |
+ SDHC_FLAG_ENHANCED;
+
+ sc->sc_ih = intr_establish(aa->aa_irq, IPL_SDMMC, IST_LEVEL,
+ sdhc_intr, &sc->sc_sdhc);
+
+ if (sc->sc_ih == NULL) {
+ aprint_error_dev(self, "can't establish interrupt\n");
+ return;
+ }
+
+ if (sdhc_host_found(&sc->sc_sdhc, iot, ioh, ESDHC_SIZE)) {
+ aprint_error_dev(self, "can't initialize host\n");
+ return;
+ }
+
+ if (!pmf_device_register1(self, sdhc_suspend, sdhc_resume,
+ sdhc_shutdown)) {
+ aprint_error_dev(self,
+ "can't establish power hook\n");
+ }
+}
