Module Name: src
Committed By: tsutsui
Date: Sat May 12 15:29:22 UTC 2012
Modified Files:
src/sys/arch/x68k/dev: fd.c
Log Message:
Explicitly specify a proper FDC data register address for HD63450 DMAC
to avoid confusion.
Previous one (fdc->sc_addr + fddata) wasn't a right address for
the FDC's data register but one for the command register by accident,
but FDC ignores A0 address input (connected to A1 of x68k address bus)
during DMA xfer (i.e. when DACK is asserted) so it happened to work
as expected on the real X680x0 hardware, but caused trouble on emulators.
The inconsistency was found by Y.Sugahara during debugging XM6i emulator
(and it will be fixed in the next release).
FDC behavior during DMA is confirmed by uPD72068 hardware application note.
XXX: There is no proper MI API to specify DMA address for DMA controller
(like MC68450) to access devices mapped to memory space by bus_space(9).
To generate a diff of this commit:
cvs rdiff -u -r1.97 -r1.98 src/sys/arch/x68k/dev/fd.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x68k/dev/fd.c
diff -u src/sys/arch/x68k/dev/fd.c:1.97 src/sys/arch/x68k/dev/fd.c:1.98
--- src/sys/arch/x68k/dev/fd.c:1.97 Sun May 6 19:46:18 2012
+++ src/sys/arch/x68k/dev/fd.c Sat May 12 15:29:22 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: fd.c,v 1.97 2012/05/06 19:46:18 tsutsui Exp $ */
+/* $NetBSD: fd.c,v 1.98 2012/05/12 15:29:22 tsutsui Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -64,7 +64,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.97 2012/05/06 19:46:18 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fd.c,v 1.98 2012/05/12 15:29:22 tsutsui Exp $");
#include "opt_ddb.h"
#include "opt_m68k_arch.h"
@@ -316,6 +316,18 @@ fdc_dmastart(struct fdc_softc *fdc, int
bus_dmamap_sync(fdc->sc_dmat, fdc->sc_dmamap, 0, count,
read?BUS_DMASYNC_PREREAD:BUS_DMASYNC_PREWRITE);
+ /*
+ * Note 1:
+ * uPD72065 ignores A0 input (connected to x68k bus A1)
+ * during DMA xfer access, but it's better to explicitly
+ * specify FDC data register address for clarification.
+ * Note 2:
+ * FDC is connected to LSB 8 bits of X68000 16 bit bus
+ * (as BUS_SPACE_MAP_SHIFTED_ODD defined in bus.h)
+ * so each FDC regsiter is mapped at sparse odd address.
+ *
+ * XXX: No proper API to get DMA address of FDC register for DMAC.
+ */
fdc->sc_xfer = dmac_prepare_xfer(fdc->sc_dmachan, fdc->sc_dmat,
fdc->sc_dmamap,
(read?
@@ -323,7 +335,7 @@ fdc_dmastart(struct fdc_softc *fdc, int
(DMAC_SCR_MAC_COUNT_UP|
DMAC_SCR_DAC_NO_COUNT),
(u_int8_t*) (fdc->sc_addr +
- fddata)); /* XXX */
+ fddata * 2 + 1));
fdc->sc_read = read;
dmac_start_xfer(fdc->sc_dmachan->ch_softc, fdc->sc_xfer);
