Module Name: src
Committed By: jakllsch
Date: Sun Jul 22 19:35:04 UTC 2012
Modified Files:
src/sys/arch/arm/marvell: mvsoctmr.c
Log Message:
Actually, the WDT-expired bit in the ICR needs to be cleared before enabling
watchdog reset.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/marvell/mvsoctmr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/marvell/mvsoctmr.c
diff -u src/sys/arch/arm/marvell/mvsoctmr.c:1.7 src/sys/arch/arm/marvell/mvsoctmr.c:1.8
--- src/sys/arch/arm/marvell/mvsoctmr.c:1.7 Sun Jul 22 16:59:10 2012
+++ src/sys/arch/arm/marvell/mvsoctmr.c Sun Jul 22 19:35:04 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: mvsoctmr.c,v 1.7 2012/07/22 16:59:10 jakllsch Exp $ */
+/* $NetBSD: mvsoctmr.c,v 1.8 2012/07/22 19:35:04 jakllsch Exp $ */
/*
* Copyright (c) 2007, 2008 KIYOHARA Takashi
* All rights reserved.
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoctmr.c,v 1.7 2012/07/22 16:59:10 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoctmr.c,v 1.8 2012/07/22 19:35:04 jakllsch Exp $");
#include "opt_ddb.h"
@@ -146,6 +146,8 @@ mvsoctmr_attach(device_t parent, device_
* stop watchdog timer, enable watchdog timer resets
*/
mvsoctmr_cntl(sc, MVSOCTMR_WATCHDOG, 0xffffffff, 0, 0);
+ write_mlmbreg(MVSOC_MLMB_MLMBICR,
+ ~(1<<MVSOC_MLMB_MLMBI_CPUWDTIMERINTREQ));
rstoutn = read_mlmbreg(MVSOC_MLMB_RSTOUTNMASKR);
write_mlmbreg(MVSOC_MLMB_RSTOUTNMASKR,
rstoutn | MVSOC_MLMB_RSTOUTNMASKR_WDRSTOUTEN);
