Module Name: src
Committed By: jdc
Date: Fri Aug 10 12:15:52 UTC 2012
Modified Files:
src/sys/arch/arm/gemini [netbsd-6]: files.gemini
src/sys/arch/arm/mpcore [netbsd-6]: files.mpcore
src/sys/arch/arm/omap [netbsd-6]: files.omap files.omap2
src/sys/arch/arm/xscale [netbsd-6]: files.pxa2x0
Added Files:
src/sys/arch/arm/arm [netbsd-6]: bus_space_a2x.S bus_space_a4x.S
Removed Files:
src/sys/arch/arm/mpcore [netbsd-6]: mpcore_a2x_io.S mpcore_a4x_io.S
src/sys/arch/arm/omap [netbsd-6]: omap_a2x_io.S
src/sys/arch/arm/xscale [netbsd-6]: pxa2x0_a4x_io.S
Log Message:
Pull up revisions:
src/sys/arch/arm/arm/bus_space_a2x.S revision 1.1
src/sys/arch/arm/arm/bus_space_a4x.S revision 1.1
src/sys/arch/arm/gemini/files.gemini revision 1.12
src/sys/arch/arm/mpcore/files.mpcore revision 1.2
src/sys/arch/arm/mpcore/mpcore_a2x_io.S delete
src/sys/arch/arm/mpcore/mpcore_a4x_io.S delete
src/sys/arch/arm/omap/files.omap revision 1.6
src/sys/arch/arm/omap/files.omap2 revision 1.9
src/sys/arch/arm/omap/omap_a2x_io.S delete
src/sys/arch/arm/xscale/files.pxa2x0 revision 1.18
src/sys/arch/arm/xscale/pxa2x0_a4x_io.S delete
(requested by skrll to fix ticket #454).
Provide generic a[24]x bus_space methods (aNx is normal access, offset
multipled by N).
Use the generic method and delete the other versions.
Discussed with matt@
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.2.2.2 src/sys/arch/arm/arm/bus_space_a2x.S \
src/sys/arch/arm/arm/bus_space_a4x.S
cvs rdiff -u -r1.11 -r1.11.10.1 src/sys/arch/arm/gemini/files.gemini
cvs rdiff -u -r1.1 -r1.1.14.1 src/sys/arch/arm/mpcore/files.mpcore
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/mpcore/mpcore_a2x_io.S \
src/sys/arch/arm/mpcore/mpcore_a4x_io.S
cvs rdiff -u -r1.5 -r1.5.58.1 src/sys/arch/arm/omap/files.omap
cvs rdiff -u -r1.8 -r1.8.10.1 src/sys/arch/arm/omap/files.omap2
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/omap/omap_a2x_io.S
cvs rdiff -u -r1.17 -r1.17.10.1 src/sys/arch/arm/xscale/files.pxa2x0
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/xscale/pxa2x0_a4x_io.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/gemini/files.gemini
diff -u src/sys/arch/arm/gemini/files.gemini:1.11 src/sys/arch/arm/gemini/files.gemini:1.11.10.1
--- src/sys/arch/arm/gemini/files.gemini:1.11 Fri Mar 11 03:16:13 2011
+++ src/sys/arch/arm/gemini/files.gemini Fri Aug 10 12:15:51 2012
@@ -1,4 +1,4 @@
-# $NetBSD: files.gemini,v 1.11 2011/03/11 03:16:13 bsh Exp $
+# $NetBSD: files.gemini,v 1.11.10.1 2012/08/10 12:15:51 jdc Exp $
#
# Configuration info for GEMINI CPU support
# Based on omap/files.omap2
@@ -29,7 +29,7 @@ file arch/arm/gemini/gemini_space.c obi
##file arch/arm/gemini/gemini_a2x_space.c obio
##file arch/arm/gemini/gemini_a2x_io.S obio
file arch/arm/gemini/gemini_a4x_space.c obio
-file arch/arm/xscale/pxa2x0_a4x_io.S obio
+file arch/arm/arm/bus_space_a4x.S obio
file arch/arm/gemini/gemini_dma.c
# these bus space methods are not bus-specific ...
Index: src/sys/arch/arm/mpcore/files.mpcore
diff -u src/sys/arch/arm/mpcore/files.mpcore:1.1 src/sys/arch/arm/mpcore/files.mpcore:1.1.14.1
--- src/sys/arch/arm/mpcore/files.mpcore:1.1 Thu Mar 10 07:47:15 2011
+++ src/sys/arch/arm/mpcore/files.mpcore Fri Aug 10 12:15:51 2012
@@ -1,4 +1,4 @@
-# $NetBSD: files.mpcore,v 1.1 2011/03/10 07:47:15 bsh Exp $
+# $NetBSD: files.mpcore,v 1.1.14.1 2012/08/10 12:15:51 jdc Exp $
#
# Configuration info for the ARM11 MPCore
#
@@ -10,9 +10,9 @@ define bus_space_a4x
file arch/arm/mpcore/mpcore_space.c
#file arch/arm/imx/imx_dma.c bus_dma_generic needs-flag
file arch/arm/mpcore/mpcore_a2x_space.c bus_space_a2x needs-flag
-file arch/arm/mpcore/mpcore_a2x_io.S bus_space_a2x
+file arch/arm/arm/bus_space_a2x.S bus_space_a2x
file arch/arm/mpcore/mpcore_a4x_space.c bus_space_a4x needs-flag
-file arch/arm/mpcore/mpcore_a4x_io.S bus_space_a4x
+file arch/arm/arm/bus_space_a4x.S bus_space_a4x
# AXI/AHB bus interface and SoC domains
device axi { [addr=-1], [size=0], [irq=-1], [irqbase=-1]} : bus_space_generic
Index: src/sys/arch/arm/omap/files.omap
diff -u src/sys/arch/arm/omap/files.omap:1.5 src/sys/arch/arm/omap/files.omap:1.5.58.1
--- src/sys/arch/arm/omap/files.omap:1.5 Mon Dec 3 15:33:19 2007
+++ src/sys/arch/arm/omap/files.omap Fri Aug 10 12:15:51 2012
@@ -1,4 +1,4 @@
-# $NetBSD: files.omap,v 1.5 2007/12/03 15:33:19 ad Exp $
+# $NetBSD: files.omap,v 1.5.58.1 2012/08/10 12:15:51 jdc Exp $
#
# Configuration info for Texas Instruments OMAP CPU support
# Based on xscale/files.pxa2x0
@@ -96,9 +96,9 @@ file arch/arm/omap/omap_ocp.c ocp
# TIPB/EMIFS/OCP common files
file arch/arm/omap/omap_space.c tipb | emifs | ocp
file arch/arm/omap/omap_a2x_space.c tipb | emifs | ocp
-file arch/arm/omap/omap_a2x_io.S tipb | emifs | ocp
+file arch/arm/arm/bus_space_a2x.S tipb | emifs | ocp
file arch/arm/omap/omap_a4x_space.c tipb | emifs | ocp
-file arch/arm/xscale/pxa2x0_a4x_io.S tipb | emifs | ocp
+file arch/arm/arm/bus_space_a4x.S tipb | emifs | ocp
# NS16550 compatible serial ports
attach com at tipb with omapuart
Index: src/sys/arch/arm/omap/files.omap2
diff -u src/sys/arch/arm/omap/files.omap2:1.8 src/sys/arch/arm/omap/files.omap2:1.8.10.1
--- src/sys/arch/arm/omap/files.omap2:1.8 Fri Mar 11 03:16:13 2011
+++ src/sys/arch/arm/omap/files.omap2 Fri Aug 10 12:15:51 2012
@@ -1,4 +1,4 @@
-# $NetBSD: files.omap2,v 1.8 2011/03/11 03:16:13 bsh Exp $
+# $NetBSD: files.omap2,v 1.8.10.1 2012/08/10 12:15:51 jdc Exp $
#
# Configuration info for Texas Instruments OMAP2/OMAP3 CPU support
# Based on xscale/files.pxa2x0
@@ -27,9 +27,9 @@ file arch/arm/omap/omap2_obio.c obio ne
# OBIO files
file arch/arm/omap/omap_space.c obio
file arch/arm/omap/omap_a2x_space.c obio
-file arch/arm/omap/omap_a2x_io.S obio
+file arch/arm/arm/bus_space_a2x.S obio
file arch/arm/omap/omap_a4x_space.c obio
-file arch/arm/xscale/pxa2x0_a4x_io.S obio
+file arch/arm/arm/bus_space_a4x.S obio
# OMAP2 interrupt controller
device omapicu: pic, pic_splfuncs
Index: src/sys/arch/arm/xscale/files.pxa2x0
diff -u src/sys/arch/arm/xscale/files.pxa2x0:1.17 src/sys/arch/arm/xscale/files.pxa2x0:1.17.10.1
--- src/sys/arch/arm/xscale/files.pxa2x0:1.17 Sat May 14 14:00:03 2011
+++ src/sys/arch/arm/xscale/files.pxa2x0 Fri Aug 10 12:15:52 2012
@@ -1,4 +1,4 @@
-# $NetBSD: files.pxa2x0,v 1.17 2011/05/14 14:00:03 nonaka Exp $
+# $NetBSD: files.pxa2x0,v 1.17.10.1 2012/08/10 12:15:52 jdc Exp $
#
# Configuration info for Intel PXA2[751]0 CPU support
#
@@ -29,7 +29,7 @@ file arch/arm/xscale/pxa2x0_gpio.c pxag
attach com at pxaip with pxauart
file arch/arm/xscale/pxa2x0_com.c pxauart
file arch/arm/xscale/pxa2x0_a4x_space.c pxauart | obio
-file arch/arm/xscale/pxa2x0_a4x_io.S pxauart | obio
+file arch/arm/arm/bus_space_a4x.S pxauart | obio
defflag opt_com.h FFUARTCONSOLE STUARTCONSOLE
BTUARTCONSOLE HWUARTCONSOLE
Added files:
Index: src/sys/arch/arm/arm/bus_space_a2x.S
diff -u /dev/null src/sys/arch/arm/arm/bus_space_a2x.S:1.2.2.2
--- /dev/null Fri Aug 10 12:15:52 2012
+++ src/sys/arch/arm/arm/bus_space_a2x.S Fri Aug 10 12:15:51 2012
@@ -0,0 +1,112 @@
+/* $NetBSD: bus_space_a2x.S,v 1.2.2.2 2012/08/10 12:15:51 jdc Exp $ */
+
+/*-
+ * Copyright (c) 2012 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nick Hudson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <machine/cpu.h>
+
+RCSID("$NetBSD: bus_space_a2x.S,v 1.2.2.2 2012/08/10 12:15:51 jdc Exp $")
+
+/*
+ * bus_space_read_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset);
+ */
+
+ENTRY(a2x_bs_r_1)
+ ldrb r0, [r1, r2, lsl #1]
+ mov pc, lr
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a2x_bs_r_2)
+ lsl r2, r2, #1
+ ldrh r0, [r1, r2]
+ mov pc, lr
+#endif
+
+ENTRY(a2x_bs_r_4)
+ ldr r0, [r1, r2, lsl #1]
+ mov pc, lr
+
+/*
+ * bus_space_read_multi_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset, uint{8,16,32}_t *data, bus_size_t count);
+ */
+
+ENTRY(a2x_bs_rm_1)
+ lsl r2, r2, #1
+ b generic_bs_rm_1
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a2x_bs_rm_2)
+ lsl r2, r2, #1
+ b generic_armv4_bs_rm_2
+#endif
+
+ENTRY(a2x_bs_rm_4)
+ lsl r2, r2, #1
+ b generic_bs_rm_4
+
+/*
+ * bus_space_write_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset, uint{8,16,32}_t value);
+ */
+ENTRY(a2x_bs_w_1)
+ strb r3, [r1, r2, lsl #1]
+ mov pc, lr
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a2x_bs_w_2)
+ lsl r2, r2, #1
+ strh r3, [r1, r2]
+ mov pc, lr
+#endif
+
+ENTRY(a2x_bs_w_4)
+ str r3, [r1, r2, lsl #1]
+ mov pc, lr
+
+/*
+ * bus_space_write_multi_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset, uint{8,16,32}_t *data, bus_size_t count);
+ */
+
+ENTRY(a2x_bs_wm_1)
+ lsl r2, r2, #1
+ b generic_bs_wm_1
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a2x_bs_wm_2)
+ lsl r2, r2, #1
+ b generic_armv4_bs_wm_2
+#endif
+
+ENTRY(a2x_bs_wm_4)
+ lsl r2, r2, #1
+ b generic_bs_wm_4
Index: src/sys/arch/arm/arm/bus_space_a4x.S
diff -u /dev/null src/sys/arch/arm/arm/bus_space_a4x.S:1.2.2.2
--- /dev/null Fri Aug 10 12:15:52 2012
+++ src/sys/arch/arm/arm/bus_space_a4x.S Fri Aug 10 12:15:51 2012
@@ -0,0 +1,112 @@
+/* $NetBSD: bus_space_a4x.S,v 1.2.2.2 2012/08/10 12:15:51 jdc Exp $ */
+
+/*-
+ * Copyright (c) 2012 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nick Hudson
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <machine/cpu.h>
+
+RCSID("$NetBSD: bus_space_a4x.S,v 1.2.2.2 2012/08/10 12:15:51 jdc Exp $")
+
+/*
+ * bus_space_read_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset);
+ */
+
+ENTRY(a4x_bs_r_1)
+ ldrb r0, [r1, r2, lsl #2]
+ mov pc, lr
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a4x_bs_r_2)
+ lsl r2, r2, #2
+ ldrh r0, [r1, r2]
+ mov pc, lr
+#endif
+
+ENTRY(a4x_bs_r_4)
+ ldr r0, [r1, r2, lsl #2]
+ mov pc, lr
+
+/*
+ * bus_space_read_multi_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset, uint{8,16,32}_t *data, bus_size_t count);
+ */
+
+ENTRY(a4x_bs_rm_1)
+ lsl r2, r2, #2
+ b generic_bs_rm_1
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a4x_bs_rm_2)
+ lsl r2, r2, #2
+ b generic_armv4_bs_rm_2
+#endif
+
+ENTRY(a4x_bs_rm_4)
+ lsl r2, r2, #2
+ b generic_bs_rm_4
+
+/*
+ * bus_space_write_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset, uint{8,16,32}_t value);
+ */
+ENTRY(a4x_bs_w_1)
+ strb r3, [r1, r2, lsl #2]
+ mov pc, lr
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a4x_bs_w_2)
+ lsl r2, r2, #2
+ strh r3, [r1, r2]
+ mov pc, lr
+#endif
+
+ENTRY(a4x_bs_w_4)
+ str r3, [r1, r2, lsl #2]
+ mov pc, lr
+
+/*
+ * bus_space_write_multi_[124](void *cookie, bus_space_handle_t handle,
+ * bus_size_t offset, uint{8,16,32}_t *data, bus_size_t count);
+ */
+
+ENTRY(a4x_bs_wm_1)
+ lsl r2, r2, #2
+ b generic_bs_wm_1
+
+#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
+ENTRY(a4x_bs_wm_2)
+ lsl r2, r2, #2
+ b generic_armv4_bs_wm_2
+#endif
+
+ENTRY(a4x_bs_wm_4)
+ lsl r2, r2, #2
+ b generic_bs_wm_4
