Module Name: src
Committed By: macallan
Date: Wed Aug 15 15:39:23 UTC 2012
Modified Files:
src/sys/dev/pci: machfbreg.h
Log Message:
add a few register definitions
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/pci/machfbreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/machfbreg.h
diff -u src/sys/dev/pci/machfbreg.h:1.4 src/sys/dev/pci/machfbreg.h:1.5
--- src/sys/dev/pci/machfbreg.h:1.4 Tue May 4 05:08:01 2010
+++ src/sys/dev/pci/machfbreg.h Wed Aug 15 15:39:23 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: machfbreg.h,v 1.4 2010/05/04 05:08:01 macallan Exp $ */
+/* $NetBSD: machfbreg.h,v 1.5 2012/08/15 15:39:23 macallan Exp $ */
/*
* Copyright 1992,1993,1994,1995,1996,1997 by Kevin E. Martin, Chapel Hill, North Carolina.
@@ -27,6 +27,11 @@
* Modified for the Mach64 by Kevin E. Martin (mar...@cs.unc.edu)
*/
+/* BARs */
+#define MACH64_BAR_APERTURE 0x10 /* all mach64 have this */
+#define MACH64_BAR_IO 0x14 /* most mach64 have this */
+#define MACH64_BAR_MMIO 0x18 /* Rage Pro and newer */
+
/* NON-GUI MEMORY MAPPED Registers - expressed in BYTE offsets */
#define CRTC_H_TOTAL_DISP 0x0000 /* Dword offset 00 */
@@ -254,9 +259,13 @@
#define AUTO_BLKWRT_DIS 0x000002000
/* BUS_CNTL register constants */
+#define BUS_APER_REG_DIS 0x00000010 /* register block 0 */
+#define BUS_EXTRA_PIPE_DIS 0x00000020 /* disable extra pipeline */
+#define BUS_DISABLE_MASTER 0x00000040 /* disable busmaster */
+#define BUS_WRITE_ROM_EN 0x00000080 /* write to flash ROM */
#define BUS_FIFO_ERR_ACK 0x00200000
#define BUS_HOST_ERR_ACK 0x00800000
-#define BUS_APER_REG_DIS 0x00000010
+#define BUS_EXT_REG_EN 0x08000000 /* register block 1 */
/* GEN_TEST_CNTL register constants */
#define GEN_OVR_OUTPUT_EN 0x20
