Module Name: src
Committed By: jakllsch
Date: Sun Aug 26 02:32:00 UTC 2012
Modified Files:
src/sys/arch/arm/broadcom: bcm2835reg.h
Log Message:
Add some more peripheral base addresses, mapping sizes, and interrupt bits.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/broadcom/bcm2835reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm2835reg.h
diff -u src/sys/arch/arm/broadcom/bcm2835reg.h:1.2 src/sys/arch/arm/broadcom/bcm2835reg.h:1.3
--- src/sys/arch/arm/broadcom/bcm2835reg.h:1.2 Mon Aug 20 07:45:24 2012
+++ src/sys/arch/arm/broadcom/bcm2835reg.h Sun Aug 26 02:32:00 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835reg.h,v 1.2 2012/08/20 07:45:24 skrll Exp $ */
+/* $NetBSD: bcm2835reg.h,v 1.3 2012/08/26 02:32:00 jakllsch Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -42,15 +42,34 @@
#define BCM2835_PERIPHERALS_SIZE 0x01000000 /* 16MBytes */
#define BCM2835_STIMER_BASE (BCM2835_PERIPHERALS_BASE + 0x00003000)
+#define BCM2835_DMA0_BASE (BCM2835_PERIPHERALS_BASE + 0x00007000)
#define BCM2835_ARM_BASE (BCM2835_PERIPHERALS_BASE + 0x0000B000)
#define BCM2835_PM_BASE (BCM2835_PERIPHERALS_BASE + 0x00100000)
+#define BCM2835_GPIO_BASE (BCM2835_PERIPHERALS_BASE + 0x00200000)
#define BCM2835_UART0_BASE (BCM2835_PERIPHERALS_BASE + 0x00201000)
+#define BCM2835_PCM_BASE (BCM2835_PERIPHERALS_BASE + 0x00203000)
+#define BCM2835_SPI0_BASE (BCM2835_PERIPHERALS_BASE + 0x00204000)
+#define BCM2835_BSC0_BASE (BCM2835_PERIPHERALS_BASE + 0x00205000)
+#define BCM2835_BSCSPISLV_BASE (BCM2835_PERIPHERALS_BASE + 0x00214000)
+#define BCM2835_AUX_BASE (BCM2835_PERIPHERALS_BASE + 0x00215000)
#define BCM2835_EMMC_BASE (BCM2835_PERIPHERALS_BASE + 0x00300000)
+#define BCM2835_BSC1_BASE (BCM2835_PERIPHERALS_BASE + 0x00804000)
+#define BCM2835_BSC2_BASE (BCM2835_PERIPHERALS_BASE + 0x00805000)
+#define BCM2835_USB_BASE (BCM2835_PERIPHERALS_BASE + 0x00980000)
+#define BCM2835_DMA15_BASE (BCM2835_PERIPHERALS_BASE + 0x00E05000)
#define BCM2835_STIMER_SIZE 0x1c
+#define BCM2835_DMA0_SIZE 0x1000
+#define BCM2835_ARM_SIZE 0x1000
#define BCM2835_PM_SIZE 0x1000
+#define BCM2835_GPIO_SIZE 0x1000
#define BCM2835_UART0_SIZE 0x90
+#define BCM2835_PCM_SIZE 0x1000
+#define BCM2835_SPI0_SIZE 0x1000
+#define BCM2835_BSC_SIZE 0x1000
+#define BCM2835_AUX_SIZE 0x1000
#define BCM2835_EMMC_SIZE 0x1000
+#define BCM2835_DMA15_SIZE 0x100
#define BCM2835_IOPHYSTOVIRT(a) \
((0xf0000000 | (((a) & 0xf0000000) >> 4)) + ((a) & ~0xf0000000))
@@ -96,8 +115,17 @@
#define BCM2835_INT_USB (BCM2835_INT_GPU0BASE + 9)
#define BCM2835_INT_DMA2 (BCM2835_INT_GPU0BASE + 18)
#define BCM2835_INT_DMA3 (BCM2835_INT_GPU0BASE + 19)
+#define BCM2835_INT_AUX (BCM2835_INT_GPU0BASE + 29)
+#define BCM2835_INT_ARM (BCM2835_INT_GPU0BASE + 30)
#define BCM2835_INT_GPU1BASE 32
+#define BCM2835_INT_GPIO0 (BCM2835_INT_GPU1BASE + 17)
+#define BCM2835_INT_GPIO1 (BCM2835_INT_GPU1BASE + 18)
+#define BCM2835_INT_GPIO2 (BCM2835_INT_GPU1BASE + 19)
+#define BCM2835_INT_GPIO3 (BCM2835_INT_GPU1BASE + 20)
+#define BCM2835_INT_BSC0 (BCM2835_INT_GPU1BASE + 21)
+#define BCM2835_INT_SPI0 (BCM2835_INT_GPU1BASE + 22)
+#define BCM2835_INT_PCM (BCM2835_INT_GPU1BASE + 23)
#define BCM2835_INT_UART0 (BCM2835_INT_GPU1BASE + 25)
#define BCM2835_INT_EMMC (BCM2835_INT_GPU1BASE + 30)
