Module Name: src
Committed By: riz
Date: Wed Oct 24 03:42:26 UTC 2012
Modified Files:
src/sys/dev/mii [netbsd-6]: miidevs.h miidevs_data.h
Log Message:
Regen for ticket 633.
To generate a diff of this commit:
cvs rdiff -u -r1.108 -r1.108.4.1 src/sys/dev/mii/miidevs.h
cvs rdiff -u -r1.96 -r1.96.4.1 src/sys/dev/mii/miidevs_data.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/miidevs.h
diff -u src/sys/dev/mii/miidevs.h:1.108 src/sys/dev/mii/miidevs.h:1.108.4.1
--- src/sys/dev/mii/miidevs.h:1.108 Fri Nov 25 23:29:28 2011
+++ src/sys/dev/mii/miidevs.h Wed Oct 24 03:42:25 2012
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs.h,v 1.108 2011/11/25 23:29:28 jakllsch Exp $ */
+/* $NetBSD: miidevs.h,v 1.108.4.1 2012/10/24 03:42:25 riz Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.105 2011/11/25 23:28:14 jakllsch Exp
+ * NetBSD: miidevs,v 1.105.4.1 2012/10/24 03:41:51 riz Exp
*/
/*-
@@ -47,7 +47,7 @@
* mapping; the bit positions are defined in IEEE 802-1990, figure 5.2.
* (There is a formal 802.3 interpretation, number 1-07/98 of July 09 1998,
* about this.)
- * The MII_OUI() macro in "mii.h" reflects this.
+ * The MII_OUI() macro in "miivar.h" reflects this.
* If a vendor uses a different mapping, an "xx" prefixed OUI is defined here
* which is mangled accordingly to compensate.
*/
@@ -63,6 +63,7 @@
#define MII_OUI_ATTANSIC 0x00c82e /* Attansic Technology */
#define MII_OUI_BROADCOM 0x001018 /* Broadcom Corporation */
#define MII_OUI_BROADCOM2 0x000af7 /* Broadcom Corporation */
+#define MII_OUI_BROADCOM3 0x001be9 /* Broadcom Corporation */
#define MII_OUI_CICADA 0x0003F1 /* Cicada Semiconductor */
#define MII_OUI_DAVICOM 0x00606e /* Davicom Semiconductor */
#define MII_OUI_ENABLESEMI 0x0010dd /* Enable Semiconductor */
@@ -135,6 +136,8 @@
#define MII_STR_ATTANSIC_L2 "L2 10/100 PHY"
#define MII_MODEL_ATTANSIC_AR8021 0x0004
#define MII_STR_ATTANSIC_AR8021 "Atheros AR8021 10/100/1000 PHY"
+#define MII_MODEL_ATTANSIC_AR8035 0x0007
+#define MII_STR_ATTANSIC_AR8035 "Atheros AR8035 10/100/1000 PHY"
/* Altima Communications PHYs */
/* Don't know the model for ACXXX */
@@ -238,6 +241,8 @@
#define MII_STR_BROADCOM2_BCM5761 "BCM5761 10/100/1000baseT PHY"
#define MII_MODEL_BROADCOM2_BCM5709S 0x003f
#define MII_STR_BROADCOM2_BCM5709S "BCM5709S 1000/2500baseSX PHY"
+#define MII_MODEL_BROADCOM3_BCM57765 0x0024
+#define MII_STR_BROADCOM3_BCM57765 "BCM57765 1000BASE-T media interface"
#define MII_MODEL_xxBROADCOM_ALT1_BCM5906 0x0004
#define MII_STR_xxBROADCOM_ALT1_BCM5906 "BCM5906 10/100baseTX media interface"
@@ -252,6 +257,8 @@
#define MII_STR_CICADA_CS8201A "Cicada CS8201 10/100/1000TX PHY"
#define MII_MODEL_CICADA_CS8201B 0x0021
#define MII_STR_CICADA_CS8201B "Cicada CS8201 10/100/1000TX PHY"
+#define MII_MODEL_xxCICADA_VSC8221 0x0015
+#define MII_STR_xxCICADA_VSC8221 "Vitesse VSC8221 10/100/1000BASE-T PHY"
#define MII_MODEL_xxCICADA_VSC8244 0x002c
#define MII_STR_xxCICADA_VSC8244 "Vitesse VSC8244 Quad 10/100/1000BASE-T PHY"
#define MII_MODEL_xxCICADA_CS8201B 0x0021
Index: src/sys/dev/mii/miidevs_data.h
diff -u src/sys/dev/mii/miidevs_data.h:1.96 src/sys/dev/mii/miidevs_data.h:1.96.4.1
--- src/sys/dev/mii/miidevs_data.h:1.96 Fri Nov 25 23:29:28 2011
+++ src/sys/dev/mii/miidevs_data.h Wed Oct 24 03:42:25 2012
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs_data.h,v 1.96 2011/11/25 23:29:28 jakllsch Exp $ */
+/* $NetBSD: miidevs_data.h,v 1.96.4.1 2012/10/24 03:42:25 riz Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.105 2011/11/25 23:28:14 jakllsch Exp
+ * NetBSD: miidevs,v 1.105.4.1 2012/10/24 03:41:51 riz Exp
*/
/*-
@@ -43,6 +43,7 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L1, MII_STR_ATTANSIC_L1 },
{ MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L2, MII_STR_ATTANSIC_L2 },
{ MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8021, MII_STR_ATTANSIC_AR8021 },
+ { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8035, MII_STR_ATTANSIC_AR8035 },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_ACXXX, MII_STR_ALTIMA_ACXXX },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101L, MII_STR_ALTIMA_AC101L },
@@ -90,12 +91,14 @@ struct mii_knowndev mii_knowndevs[] = {
{ MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709C, MII_STR_BROADCOM2_BCM5709C },
{ MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5761, MII_STR_BROADCOM2_BCM5761 },
{ MII_OUI_BROADCOM2, MII_MODEL_BROADCOM2_BCM5709S, MII_STR_BROADCOM2_BCM5709S },
+ { MII_OUI_BROADCOM3, MII_MODEL_BROADCOM3_BCM57765, MII_STR_BROADCOM3_BCM57765 },
{ MII_OUI_xxBROADCOM_ALT1, MII_MODEL_xxBROADCOM_ALT1_BCM5906, MII_STR_xxBROADCOM_ALT1_BCM5906 },
{ MII_OUI_CICADA, MII_MODEL_CICADA_CS8201, MII_STR_CICADA_CS8201 },
{ MII_OUI_CICADA, MII_MODEL_CICADA_CS8204, MII_STR_CICADA_CS8204 },
{ MII_OUI_CICADA, MII_MODEL_CICADA_VSC8211, MII_STR_CICADA_VSC8211 },
{ MII_OUI_CICADA, MII_MODEL_CICADA_CS8201A, MII_STR_CICADA_CS8201A },
{ MII_OUI_CICADA, MII_MODEL_CICADA_CS8201B, MII_STR_CICADA_CS8201B },
+ { MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8221, MII_STR_xxCICADA_VSC8221 },
{ MII_OUI_xxCICADA, MII_MODEL_xxCICADA_VSC8244, MII_STR_xxCICADA_VSC8244 },
{ MII_OUI_xxCICADA, MII_MODEL_xxCICADA_CS8201B, MII_STR_xxCICADA_CS8201B },
{ MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9101, MII_STR_xxDAVICOM_DM9101 },
