Module Name: src
Committed By: skrll
Date: Wed Oct 24 21:23:45 UTC 2012
Modified Files:
src/sys/arch/evbarm/dev: plcomreg.h
Log Message:
Add the ifls register.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbarm/dev/plcomreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/dev/plcomreg.h
diff -u src/sys/arch/evbarm/dev/plcomreg.h:1.4 src/sys/arch/evbarm/dev/plcomreg.h:1.5
--- src/sys/arch/evbarm/dev/plcomreg.h:1.4 Wed Jul 25 07:26:17 2012
+++ src/sys/arch/evbarm/dev/plcomreg.h Wed Oct 24 21:23:45 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: plcomreg.h,v 1.4 2012/07/25 07:26:17 skrll Exp $ */
+/* $NetBSD: plcomreg.h,v 1.5 2012/10/24 21:23:45 skrll Exp $ */
/*-
* Copyright (c) 2001 ARM Ltd
@@ -106,6 +106,15 @@
#define PL01X_MSR_CTS PL01X_FR_CTS
#define PL011_MSR_RI PL011_FR_RI
+/* ifls */
+#define PL011_IFLS_1EIGHTH 0
+#define PL011_IFLS_1QUARTER 1
+#define PL011_IFLS_1HALF 2
+#define PL011_IFLS_3QUARTERS 3
+#define PL011_IFLS_7EIGHTHS 4
+#define PL011_IFLS_RXIFLS(x) (((x) & 0x7) << 3)
+#define PL011_IFLS_TXIFLS(x) (((x) & 0x7) << 0)
+
/* All interrupt status/clear registers */
#define PL011_INT_OE 0x400
#define PL011_INT_BE 0x200
