Module Name:    src
Committed By:   macallan
Date:           Tue Feb  5 21:52:48 UTC 2013

Modified Files:
        src/sys/arch/sparc/conf: files.sparc
Added Files:
        src/sys/arch/sparc/dev: sx.c sxreg.h sxvar.h

Log Message:
attachment and initialization for SX


To generate a diff of this commit:
cvs rdiff -u -r1.152 -r1.153 src/sys/arch/sparc/conf/files.sparc
cvs rdiff -u -r0 -r1.1 src/sys/arch/sparc/dev/sx.c \
    src/sys/arch/sparc/dev/sxreg.h src/sys/arch/sparc/dev/sxvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/conf/files.sparc
diff -u src/sys/arch/sparc/conf/files.sparc:1.152 src/sys/arch/sparc/conf/files.sparc:1.153
--- src/sys/arch/sparc/conf/files.sparc:1.152	Tue Nov  6 07:59:09 2012
+++ src/sys/arch/sparc/conf/files.sparc	Tue Feb  5 21:52:48 2013
@@ -1,4 +1,4 @@
-#	$NetBSD: files.sparc,v 1.152 2012/11/06 07:59:09 alnsn Exp $
+#	$NetBSD: files.sparc,v 1.153 2013/02/05 21:52:48 macallan Exp $
 
 # @(#)files.sparc	8.1 (Berkeley) 7/19/93
 # sparc-specific configuration info
@@ -118,6 +118,10 @@ device eccmemctl
 attach eccmemctl at mainbus
 file	arch/sparc/sparc/memecc.c		eccmemctl
 
+device sx {}
+attach sx at mainbus
+file	arch/sparc/dev/sx.c			sx needs-flag
+
 device tctrl: sysmon_envsys, sysmon_power, sysmon_taskq
 attach tctrl at obio
 file	arch/sparc/dev/tctrl.c			tctrl needs-flag
@@ -251,7 +255,7 @@ device cgeight: bt_dac, fb, rasops24, pf
 attach cgeight at obio
 file	arch/sparc/dev/cgeight.c	cgeight needs-flag
 
-device cgfourteen: fb, rasops32, rasops8, wsemuldisplaydev
+device cgfourteen: fb, rasops8, wsemuldisplaydev
 attach cgfourteen at obio
 file	arch/sparc/dev/cgfourteen.c	cgfourteen needs-flag
 

Added files:

Index: src/sys/arch/sparc/dev/sx.c
diff -u /dev/null src/sys/arch/sparc/dev/sx.c:1.1
--- /dev/null	Tue Feb  5 21:52:48 2013
+++ src/sys/arch/sparc/dev/sx.c	Tue Feb  5 21:52:48 2013
@@ -0,0 +1,141 @@
+/*	$NetBSD: sx.c,v 1.1 2013/02/05 21:52:48 macallan Exp $	*/
+
+/*-
+ * Copyright (c) 2013 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Michael Lorenz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: sx.c,v 1.1 2013/02/05 21:52:48 macallan Exp $");
+
+#include "locators.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <sys/bus.h>
+#include <sparc/dev/sbusvar.h>
+#include <machine/autoconf.h>
+#include <machine/cpu.h>
+#include <machine/ctlreg.h>
+#include <sparc/sparc/asm.h>
+#include <sparc/dev/sxvar.h>
+#include <sparc/dev/sxreg.h>
+
+
+
+/* autoconfiguration driver */
+static	int sx_match(device_t, struct cfdata *, void *);
+static	void sx_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(sx, sizeof(struct sx_softc),
+    sx_match, sx_attach, NULL, NULL);
+
+static int
+sx_match(device_t parent, struct cfdata *cf, void *aux)
+{
+	struct mainbus_attach_args *ma = aux;
+
+	return (strcmp("SUNW,sx", ma->ma_name) == 0);
+}
+
+static void
+sx_attach(device_t parent, device_t self, void *aux)
+{
+	struct sx_softc *sc = device_private(self);
+	struct mainbus_attach_args *ma = aux;
+    	int i;
+#ifdef SX_DEBUG
+	int j;
+#endif
+
+	printf("\n");
+
+	sc->sc_dev = self;
+	sc->sc_tag = ma->ma_bustag;
+	sc->sc_uregs = ma->ma_paddr + 0x1000;
+
+	if (bus_space_map(sc->sc_tag, ma->ma_paddr, 0x1000, 0, &sc->sc_regh)) {
+		aprint_error_dev(self, "failed to map registers\n");
+		return;
+	}
+
+	/* stop the processor */
+	sx_write(sc, SX_CONTROL_STATUS, 0);
+	/* initialize control registers, clear errors etc. */
+	sx_write(sc, SX_R0_INIT, 0);
+	sx_write(sc, SX_ERROR, 0);
+	/* default, to be overriden once cgfourteen takes over */
+	sx_write(sc, SX_PAGE_BOUND_LOWER, 0xfc000000);
+	/* cg14 takes up the whole 64MB chunk */
+	sx_write(sc, SX_PAGE_BOUND_UPPER, 0xffffffff);
+	sx_write(sc, SX_DIAGNOSTICS, 0);
+	sx_write(sc, SX_PLANEMASK, 0xffffffff);
+
+	/*
+	 * initialize all other registers
+	 * use the direct port since the processor is stopped
+	 */
+	for (i = 4; i < 0x200; i += 4) 
+		sx_write(sc, SX_DIRECT_R0 + i, 0);
+
+	/* ... and start the processor again */
+	sx_write(sc, SX_CONTROL_STATUS, SX_PB | SX_GO);
+
+#ifdef SX_DEBUG
+	sta(0xfc000000, ASI_SX, SX_LD(8, 31));
+	for (i = 1; i < 60; i++)
+		sta(0xfc000000 + (i * 1280), ASI_SX, SX_ST(8, 31));
+	for (i = 900; i < 1000; i++)
+		sta(0xfc000000 + (i * 1280) + 600, ASI_SX, SX_ST(0, 31));
+
+    	for (i = 0; i < 0x30; i+= 16) {
+    		printf("%08x:", i);
+    		for (j = 0; j < 16; j += 4) {
+			if ((i + j) > 0x28) continue;
+    			printf(" %08x",
+    			    bus_space_read_4(sc->sc_tag, sc->sc_regh, i + j));
+		}
+		printf("\n");
+	}
+	printf("registers:\n");
+    	for (i = 0x300; i < 0x500; i+= 16) {
+    		printf("%08x:", i);
+    		for (j = 0; j < 16; j += 4) {
+    			printf(" %08x",
+    			    bus_space_read_4(sc->sc_tag, sc->sc_regh,
+    			        i + j));
+		}
+		printf("\n");
+	}
+#endif
+}
+
Index: src/sys/arch/sparc/dev/sxreg.h
diff -u /dev/null src/sys/arch/sparc/dev/sxreg.h:1.1
--- /dev/null	Tue Feb  5 21:52:48 2013
+++ src/sys/arch/sparc/dev/sxreg.h	Tue Feb  5 21:52:48 2013
@@ -0,0 +1,150 @@
+/*	$NetBSD: sxreg.h,v 1.1 2013/02/05 21:52:48 macallan Exp $	*/
+
+/*-
+ * Copyright (c) 2013 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Michael Lorenz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* register definitions for Sun's SX / SPAM rendering engine */
+
+#ifndef SXREG_H
+#define SXREG_H
+
+/* SX control registers */
+#define SX_CONTROL_STATUS	0x00000000
+#define SX_ERROR		0x00000004
+#define SX_PAGE_BOUND_LOWER	0x00000008
+#define SX_PAGE_BOUND_UPPER	0x0000000c
+#define SX_PLANEMASK		0x00000010
+#define SX_ROP_CONTROL		0x00000014	/* 8 bit ROP */
+#define SX_IQ_OVERFLOW_COUNTER	0x00000018
+#define SX_DIAGNOSTICS		0x0000001c
+#define SX_INSTRUCTIONS		0x00000020
+#define SX_ID			0x00000028
+#define SX_R0_INIT		0x0000002c
+#define SX_SOFTRESET		0x00000030
+/* write registers directly, only when processor is stopped */
+#define SX_DIRECT_R0		0x00000100
+#define SX_DIRECT_R1		0x00000104	/* and so on until R127 */
+/* write registers via pseudo instructions */
+#define SX_QUEUED_R0		0x00000300
+#define SX_QUEUED_R1		0x00000304	/* and so on until R127 */
+
+/*
+ * registers are repeated at 0x1000 with certain parts read only
+ * ( like the PAGE_BOUND registers ) which userlanf has no business writing to
+ */
+
+/* SX_CONTROL_STATUS */
+#define SX_EE1		0x00000001	/* illegal instruction */
+#define SX_EE2		0x00000002	/* page bound error */
+#define SX_EE3		0x00000004	/* illegal memory access */
+#define SX_EE4		0x00000008	/* illegal register access */
+#define SX_EE5		0x00000010	/* alignment violation */
+#define SX_EE6		0x00000020	/* illegal instruction queue write */
+#define SX_EI		0x00000080	/* interrupt on error */
+#define SX_PB		0x00001000	/* enable page bound checking */
+#define SX_WO		0x00002000	/* write occured ( by SX ) */
+#define SX_GO		0x00004000	/* start/stop the processor */
+#define SX_MT		0x00008000	/* instruction queue is empty */
+
+/* SX_ERROR */
+#define SX_SE1		0x00000001	/* illegal instruction */
+#define SX_SE2		0x00000002	/* page bound error */
+#define SX_SE3		0x00000004	/* illegal memory access */
+#define SX_SE4		0x00000008	/* illegal register access */
+#define SX_SE5		0x00000010	/* alignment violation */
+#define SX_SE6		0x00000020	/* illegal instruction queue write */
+#define SX_SI		0x00000080	/* interrupt on error */
+
+/* SX_ID */
+#define SX_ARCHITECTURE_MASK	0x000000ff
+#define SX_CHIP_REVISION	0x0000ff00
+
+/* SX_DIAGNOSTICS */
+#define SX_IQ_FIFO_ACCESS	0x00000001	/* allow memory instructions
+						 * in SX_INSTRUCTIONS */
+
+/*
+ * memory referencing instructions are written to 0x800000000 + PA
+ * so we have to go through ASI 0x28 ( ASI_BYPASS + 8 )
+ */
+#define ASI_SX	0x28
+
+/* load / store instructions */
+#define SX_STORE_COND	(0x4 << 19)	/* conditional write with mask */
+#define SX_STORE_CLAMP	(0x2 << 19)
+#define SX_STORE_MASK	(0x1 << 19)	/* apply plane mask */
+#define SX_STORE_SELECT	(0x9 << 19)	/* expand with plane reg dest[0]/dest[1] */
+#define SX_LOAD		(0xa << 19)
+#define SX_STORE	(0x0 << 19)
+
+/* data type */
+#define SX_UBYTE_0	(0x00 << 14)
+#define SX_UBYTE_8	(0x01 << 14)
+#define SX_UBYTE_16	(0x02 << 14)
+#define SX_UBYTE_24	(0x03 << 14)
+#define SX_SBYTE_0	(0x04 << 14)
+#define SX_SBYTE_8	(0x05 << 14)
+#define SX_SBYTE_16	(0x06 << 14)
+#define SX_SBYTE_24	(0x07 << 14)
+#define SX_UQUAD_0	(0x08 << 14)
+#define SX_UQUAD_8	(0x09 << 14)
+#define SX_UQUAD_16	(0x0a << 14)
+#define SX_UQUAD_24	(0x0b << 14)
+#define SX_SQUAD_0	(0x0c << 14)
+#define SX_SQUAD_8	(0x0d << 14)
+#define SX_SQUAD_16	(0x0e << 14)
+#define SX_SQUAD_24	(0x0f << 14)
+#define SX_UCHAN_0	(0x10 << 14)
+#define SX_UCHAN_8	(0x11 << 14)
+#define SX_UCHAN_16	(0x12 << 14)
+#define SX_UCHAN_24	(0x13 << 14)
+#define SX_SCHAN_0	(0x14 << 14)
+#define SX_SCHAN_8	(0x15 << 14)
+#define SX_SCHAN_16	(0x16 << 14)
+#define SX_SCHAN_24	(0x17 << 14)
+#define SX_USHORT_0	(0x18 << 14)
+#define SX_USHORT_8	(0x19 << 14)
+#define SX_USHORT_16	(0x1a << 14)
+#define SX_SSHORT_0	(0x1c << 14)
+#define SX_SSHORT_8	(0x1d << 14)
+#define SX_SSHORT_16	(0x1e << 14)
+#define SX_LONG		(0x1b << 14)
+#define SX_PACKED	(0x1f << 14)
+
+
+#define SX_LD(dreg, cnt)  (0x80000000 | (cnt << 23) | SX_STORE | SX_LONG | (dreg << 7))
+#define SX_LDB(dreg, cnt) (0x80000000 | (cnt << 23) | SX_STORE | SX_UBYTE_0 | (dreg << 7))
+#define SX_LDP(dreg, cnt) (0x80000000 | (cnt << 23) | SX_STORE | SX_PACKED | (dreg << 7))
+#define SX_ST(sreg, cnt)  (0x80000000 | (cnt << 23) | SX_LOAD  | SX_LONG | (sreg << 7))
+#define SX_STB(sreg, cnt) (0x80000000 | (cnt << 23) | SX_LOAD  | SX_UBYTE_0 | (sreg << 7))
+#define SX_STP(sreg, cnt) (0x80000000 | (cnt << 23) | SX_LOAD  | SX_PACKED | (sreg << 7))
+#define SX_STS(sreg, cnt) (0x80000000 | (cnt << 23) | SX_STORE_SELECT | SX_LONG | (sreg << 7))
+#define SX_STBS(reg, cnt) (0x80000000 | (cnt << 23) | SX_STORE_SELECT | SX_UBYTE_0 | (reg << 7))
+
+#endif /* SXREG_H */
Index: src/sys/arch/sparc/dev/sxvar.h
diff -u /dev/null src/sys/arch/sparc/dev/sxvar.h:1.1
--- /dev/null	Tue Feb  5 21:52:48 2013
+++ src/sys/arch/sparc/dev/sxvar.h	Tue Feb  5 21:52:48 2013
@@ -0,0 +1,48 @@
+/*	$NetBSD: sxvar.h,v 1.1 2013/02/05 21:52:48 macallan Exp $	*/
+
+/*-
+ * Copyright (c) 2013 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Michael Lorenz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef SXVAR_H
+#define SXVAR_H
+
+struct sx_softc {
+	device_t		sc_dev;
+	bus_addr_t		sc_uregs;
+	bus_space_tag_t		sc_tag;
+	bus_space_handle_t	sc_regh;
+};
+
+static inline void
+sx_write(struct sx_softc *sc, int addr, uint32_t val)
+{
+	bus_space_write_4(sc->sc_tag, sc->sc_regh, addr, val);
+}
+
+#endif
\ No newline at end of file

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