Module Name:    src
Committed By:   matt
Date:           Wed Feb 13 23:52:45 UTC 2013

Modified Files:
        src/sys/arch/arm/include [matt-nb6-plus]: bus_defs.h
        src/sys/sys [matt-nb6-plus]: bus_proto.h

Log Message:
Sync with HEAD


To generate a diff of this commit:
cvs rdiff -u -r1.1.10.1 -r1.1.10.2 src/sys/arch/arm/include/bus_defs.h
cvs rdiff -u -r1.6 -r1.6.10.1 src/sys/sys/bus_proto.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/include/bus_defs.h
diff -u src/sys/arch/arm/include/bus_defs.h:1.1.10.1 src/sys/arch/arm/include/bus_defs.h:1.1.10.2
--- src/sys/arch/arm/include/bus_defs.h:1.1.10.1	Wed Nov 28 22:40:28 2012
+++ src/sys/arch/arm/include/bus_defs.h	Wed Feb 13 23:52:45 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_defs.h,v 1.1.10.1 2012/11/28 22:40:28 matt Exp $	*/
+/*	$NetBSD: bus_defs.h,v 1.1.10.2 2013/02/13 23:52:45 matt Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -300,7 +300,8 @@ struct bus_space {
  * Private flags stored in the DMA map.
  */
 #define	_BUS_DMAMAP_COHERENT	0x10000	/* no cache flush necessary on sync */
-#define	_BUS_DMAMAP_IS_BOUNCING	0x20000	/* is bouncing current xfer */
+#define	_BUS_DMAMAP_IS_BOUNCING	0x20000 /* is bouncing current xfer */
+#define	_BUS_DMAMAP_NOALLOC	0x40000	/* don't alloc memory from this range */
 
 /* Forwards needed by prototypes below. */
 struct mbuf;

Index: src/sys/sys/bus_proto.h
diff -u src/sys/sys/bus_proto.h:1.6 src/sys/sys/bus_proto.h:1.6.10.1
--- src/sys/sys/bus_proto.h:1.6	Wed Aug 17 10:46:38 2011
+++ src/sys/sys/bus_proto.h	Wed Feb 13 23:52:45 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: bus_proto.h,v 1.6 2011/08/17 10:46:38 martin Exp $	*/
+/*	$NetBSD: bus_proto.h,v 1.6.10.1 2013/02/13 23:52:45 matt Exp $	*/
 
 /*-
  * Copyright (c) 1996, 1997, 1998, 2001, 2007 The NetBSD Foundation, Inc.
@@ -319,6 +319,8 @@ bool	bus_space_handle_is_equal(bus_space
 #define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
 #define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
 #define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
+#define	BUS_DMA_PREFETCHABLE	0x800	/* hint: map non-cached but allow 
+					 * things like write combining */
 
 /* Operations performed by bus_dmamap_sync(). */
 #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */

Reply via email to