Module Name: src
Committed By: riastradh
Date: Wed Jul 24 02:59:14 UTC 2013
Modified Files:
src/sys/external/bsd/drm2/dist/drm/i915 [riastradh-drm2]: i915_dma.c
i915_drv.c i915_drv.h
Log Message:
Replace i915 private regs from pci_ioremap to drm_ioremap.
Replace read/write{b,l,w} by DRM_READ/WRITE{8,16,32} in i915_drv.c.
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.1.2.2 -r1.1.1.1.2.3 \
src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c \
src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.c \
src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c
diff -u src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c:1.1.1.1.2.2 src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c:1.1.1.1.2.3
--- src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c:1.1.1.1.2.2 Tue Jul 23 21:28:22 2013
+++ src/sys/external/bsd/drm2/dist/drm/i915/i915_dma.c Wed Jul 24 02:59:14 2013
@@ -1509,12 +1509,32 @@ int i915_driver_load(struct drm_device *
else
mmio_size = 2*1024*1024;
+#ifdef __NetBSD__
+ /* XXX Maybe it would be better to just use pci_mapreg_map... */
+ {
+ bus_addr_t addr;
+ bus_size_t size;
+
+ if (pci_mapreg_info(dev->pdev->pd_pa.pa_pc,
+ dev->pdev->pd_pa.pa_tag, mmio_bar, PCI_MAPREG_TYPE_MEM,
+ &addr, &size, NULL /* XXX flags? */)) {
+ ret = -EIO; /* XXX */
+ goto put_gmch;
+ }
+
+ ret = drm_addmap(dev, addr, size, _DRM_REGISTERS,
+ (_DRM_KERNEL | _DRM_DRIVER), &dev_priv->regs_map);
+ if (ret)
+ goto put_gmch;
+ }
+#else
dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, mmio_size);
if (!dev_priv->regs) {
DRM_ERROR("failed to map registers\n");
ret = -EIO;
goto put_gmch;
}
+#endif
aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
@@ -1641,7 +1661,11 @@ out_mtrrfree:
}
io_mapping_free(dev_priv->mm.gtt_mapping);
out_rmmap:
+#ifdef __NetBSD__
+ (void)drm_rmmap(dev, dev_priv->regs_map);
+#else
pci_iounmap(dev->pdev, dev_priv->regs);
+#endif
put_gmch:
i915_gem_gtt_fini(dev);
put_bridge:
@@ -1731,8 +1755,13 @@ int i915_driver_unload(struct drm_device
i915_free_hws(dev);
}
+#ifdef __NetBSD__
+ if (dev_priv->regs_map != NULL)
+ (void)drm_rmmap(dev, dev_priv->regs_map);
+#else
if (dev_priv->regs != NULL)
pci_iounmap(dev->pdev, dev_priv->regs);
+#endif
intel_teardown_gmbus(dev);
intel_teardown_mchbar(dev);
Index: src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.c
diff -u src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.c:1.1.1.1.2.2 src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.c:1.1.1.1.2.3
--- src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.c:1.1.1.1.2.2 Tue Jul 23 21:28:22 2013
+++ src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.c Wed Jul 24 02:59:14 2013
@@ -1218,6 +1218,30 @@ ilk_dummy_write(struct drm_i915_private
I915_WRITE_NOTRACE(MI_MODE, 0);
}
+#ifdef __NetBSD__
+#define __i915_read(x, y) \
+u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
+ u##x val = 0; \
+ if (IS_GEN5(dev_priv->dev)) \
+ ilk_dummy_write(dev_priv); \
+ if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
+ unsigned long irqflags; \
+ spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
+ if (dev_priv->forcewake_count == 0) \
+ dev_priv->gt.force_wake_get(dev_priv); \
+ val = DRM_READ##x(dev_priv->regs_map, reg); \
+ if (dev_priv->forcewake_count == 0) \
+ dev_priv->gt.force_wake_put(dev_priv); \
+ spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
+ } else if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
+ val = DRM_READ##x(dev_priv->regs_map, reg + 0x180000); \
+ } else { \
+ val = DRM_READ##x(dev_priv->regs_map, reg); \
+ } \
+ trace_i915_reg_rw(false, reg, val, sizeof(val)); \
+ return val; \
+}
+#else
#define __i915_read(x, y) \
u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
u##x val = 0; \
@@ -1240,6 +1264,7 @@ u##x i915_read##x(struct drm_i915_privat
trace_i915_reg_rw(false, reg, val, sizeof(val)); \
return val; \
}
+#endif
__i915_read(8, b)
__i915_read(16, w)
@@ -1247,6 +1272,34 @@ __i915_read(32, l)
__i915_read(64, q)
#undef __i915_read
+#ifdef __NetBSD__
+#define __i915_write(x, y) \
+void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
+ u32 __fifo_ret = 0; \
+ trace_i915_reg_rw(true, reg, val, sizeof(val)); \
+ if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
+ __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
+ } \
+ if (IS_GEN5(dev_priv->dev)) \
+ ilk_dummy_write(dev_priv); \
+ if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
+ DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \
+ I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \
+ } \
+ if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
+ DRM_WRITE##x(dev_priv->regs_map, reg + 0x180000, val); \
+ } else { \
+ DRM_WRITE##x(dev_priv->regs_map, reg, val); \
+ } \
+ if (unlikely(__fifo_ret)) { \
+ gen6_gt_check_fifodbg(dev_priv); \
+ } \
+ if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
+ DRM_ERROR("Unclaimed write to %x\n", reg); \
+ DRM_WRITE32(dev_priv->regs_map, GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \
+ } \
+}
+#else
#define __i915_write(x, y) \
void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
u32 __fifo_ret = 0; \
@@ -1273,6 +1326,8 @@ void i915_write##x(struct drm_i915_priva
writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT); \
} \
}
+#endif
+
__i915_write(8, b)
__i915_write(16, w)
__i915_write(32, l)
Index: src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h
diff -u src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h:1.1.1.1.2.2 src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h:1.1.1.1.2.3
--- src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h:1.1.1.1.2.2 Tue Jul 23 21:28:22 2013
+++ src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h Wed Jul 24 02:59:14 2013
@@ -627,7 +627,11 @@ typedef struct drm_i915_private {
int relative_constants_mode;
+#ifdef __NetBSD__
+ struct drm_local_map *regs_map;
+#else
void __iomem *regs;
+#endif
struct drm_i915_gt_funcs gt;
/** gt_fifo_count and the subsequent register write are synchronized
