Module Name: src
Committed By: riastradh
Date: Wed Jul 24 04:02:12 UTC 2013
Modified Files:
src/sys/external/bsd/drm2/i915drm [riastradh-drm2]: intel_pm.c
intel_ringbuffer.c
Removed Files:
src/sys/external/bsd/drm2/i915drm [riastradh-drm2]: i915_irq.c
Log Message:
Kludge up i915 stubs and start using the real i915_irq.c.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.3 -r0 src/sys/external/bsd/drm2/i915drm/i915_irq.c
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/external/bsd/drm2/i915drm/intel_pm.c
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 \
src/sys/external/bsd/drm2/i915drm/intel_ringbuffer.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/external/bsd/drm2/i915drm/intel_pm.c
diff -u src/sys/external/bsd/drm2/i915drm/intel_pm.c:1.1.2.3 src/sys/external/bsd/drm2/i915drm/intel_pm.c:1.1.2.4
--- src/sys/external/bsd/drm2/i915drm/intel_pm.c:1.1.2.3 Wed Jul 24 03:59:34 2013
+++ src/sys/external/bsd/drm2/i915drm/intel_pm.c Wed Jul 24 04:02:12 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: intel_pm.c,v 1.1.2.3 2013/07/24 03:59:34 riastradh Exp $ */
+/* $NetBSD: intel_pm.c,v 1.1.2.4 2013/07/24 04:02:12 riastradh Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
/* intel_pm.c stubs */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_pm.c,v 1.1.2.3 2013/07/24 03:59:34 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_pm.c,v 1.1.2.4 2013/07/24 04:02:12 riastradh Exp $");
#include "i915_drv.h"
@@ -47,6 +47,70 @@ gen6_gt_check_fifodbg(struct drm_i915_pr
{
}
+/* XXX BEGIN KLUDGEY COPYPASTA FROM intel_pm.c */
+
+/* There's a funny hw issue where the hw returns all 0 when reading from
+ * GEN6_RP_INTERRUPT_LIMITS. Hence we always need to compute the desired value
+ * ourselves, instead of doing a rmw cycle (which might result in us clearing
+ * all limits and the gpu stuck at whatever frequency it is at atm).
+ */
+static u32
+gen6_rps_limits(struct drm_i915_private *dev_priv, u8 *val)
+{
+ u32 limits;
+
+ limits = 0;
+
+ if (*val >= dev_priv->rps.max_delay)
+ *val = dev_priv->rps.max_delay;
+ limits |= dev_priv->rps.max_delay << 24;
+
+ /* Only set the down limit when we've reached the lowest level to avoid
+ * getting more interrupts, otherwise leave this clear. This prevents a
+ * race in the hw when coming out of rc6: There's a tiny window where
+ * the hw runs at the minimal clock before selecting the desired
+ * frequency, if the down threshold expires in that window we will not
+ * receive a down interrupt. */
+ if (*val <= dev_priv->rps.min_delay) {
+ *val = dev_priv->rps.min_delay;
+ limits |= dev_priv->rps.min_delay << 16;
+ }
+
+ return limits;
+}
+
+void
+gen6_set_rps(struct drm_device *dev, u8 val)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ u32 limits = gen6_rps_limits(dev_priv, &val);
+
+ WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
+ WARN_ON(val > dev_priv->rps.max_delay);
+ WARN_ON(val < dev_priv->rps.min_delay);
+
+ if (val == dev_priv->rps.cur_delay)
+ return;
+
+ I915_WRITE(GEN6_RPNSWREQ,
+ GEN6_FREQUENCY(val) |
+ GEN6_OFFSET(0) |
+ GEN6_AGGRESSIVE_TURBO);
+
+ /* Make sure we continue to get interrupts
+ * until we hit the minimum or maximum frequencies.
+ */
+ I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
+
+ POSTING_READ(GEN6_RPNSWREQ);
+
+ dev_priv->rps.cur_delay = val;
+
+ trace_intel_gpu_freq_change(val * 50);
+}
+
+/* XXX END KLUDGEY COPYPASTA FROM intel_pm.c */
+
void
intel_disable_fbc(struct drm_device *dev __unused)
{
@@ -119,6 +183,37 @@ intel_update_watermarks(struct drm_devic
{
}
+/*
+ * XXX Kludge! Copypasta from intel_pm.c until we can use the whole
+ * thing.
+ */
+spinlock_t mchdev_lock;
+
+bool
+ironlake_set_drps(struct drm_device *dev, u8 val)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ u16 rgvswctl;
+
+ assert_spin_locked(&mchdev_lock);
+
+ rgvswctl = I915_READ16(MEMSWCTL);
+ if (rgvswctl & MEMCTL_CMD_STS) {
+ DRM_DEBUG("gpu busy, RCS change rejected\n");
+ return false; /* still busy with another command */
+ }
+
+ rgvswctl = (MEMCTL_CMD_CHFREQ << MEMCTL_CMD_SHIFT) |
+ (val << MEMCTL_FREQ_SHIFT) | MEMCTL_SFCAVM;
+ I915_WRITE16(MEMSWCTL, rgvswctl);
+ POSTING_READ16(MEMSWCTL);
+
+ rgvswctl |= MEMCTL_CMD_STS;
+ I915_WRITE16(MEMSWCTL, rgvswctl);
+
+ return true;
+}
+
void
ironlake_teardown_rc6(struct drm_device *dev __unused)
{
Index: src/sys/external/bsd/drm2/i915drm/intel_ringbuffer.c
diff -u src/sys/external/bsd/drm2/i915drm/intel_ringbuffer.c:1.1.2.1 src/sys/external/bsd/drm2/i915drm/intel_ringbuffer.c:1.1.2.2
--- src/sys/external/bsd/drm2/i915drm/intel_ringbuffer.c:1.1.2.1 Wed Jul 24 03:52:13 2013
+++ src/sys/external/bsd/drm2/i915drm/intel_ringbuffer.c Wed Jul 24 04:02:12 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: intel_ringbuffer.c,v 1.1.2.1 2013/07/24 03:52:13 riastradh Exp $ */
+/* $NetBSD: intel_ringbuffer.c,v 1.1.2.2 2013/07/24 04:02:12 riastradh Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
/* intel_ringbuffer.c stubs */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_ringbuffer.c,v 1.1.2.1 2013/07/24 03:52:13 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_ringbuffer.c,v 1.1.2.2 2013/07/24 04:02:12 riastradh Exp $");
#include "i915_drv.h"
@@ -59,6 +59,21 @@ intel_ring_begin(struct intel_ring_buffe
return ENOTTY;
}
+/*
+ * XXX Kludge! Copypasta from intel_ringbuffer.c until we can use the
+ * whole thing.
+ */
+
+u32
+intel_ring_get_active_head(struct intel_ring_buffer *ring)
+{
+ drm_i915_private_t *dev_priv = ring->dev->dev_private;
+ u32 acthd_reg = INTEL_INFO(ring->dev)->gen >= 4 ?
+ RING_ACTHD(ring->mmio_base) : ACTHD;
+
+ return I915_READ(acthd_reg);
+}
+
int
intel_ring_idle(struct intel_ring_buffer *ring __unused)
{
