Module Name:    src
Committed By:   jdc
Date:           Mon Jul 29 20:24:04 UTC 2013

Modified Files:
        src/sys/dev/pci [netbsd-6]: if_wm.c if_wmreg.h

Log Message:
Pull up revisions:
  src/sys/dev/pci/if_wm.c revisions 1.259,1.260,1.261,1.262
  src/sys/dev/pci/if_wmreg.h revision 1.54
(requested by msaitoh in ticket #918).

 Fix "MDIC write error" bug for 82574 and 82583. For those chips, the semaphore
must be released after chip reset. Found and tested by Mark Davies.

 Sync the wm_enable_mng_pass_thru() function with FreeBSD. Don't check
MANC_EN_MAC_ADDR_FILTER bit. Add 82574 and 82583 specific check. This
modification may change the setting of WM_F_HAS_MANAGE flag on some machines.

 Sync the wm_release_manageablilty() fucntion with FreeBSD. Set MANC_ARP_EN.
This change enables HW ARP function when entering suspend.

 When the chip is 82580(ER) or I350, set WM_F_ASF_FIRMWARE_PRES flag and
check for the WM_F_ARC_SUBSYS_VALID flag. Same as FreeBSD.

 Move the location of wm_check_mng_mode() and wm_get_wakeup() in wm_attach().
Those functions access EEPROM, so they have to call after identifying EEPROM
access type. This modification may change the behavior of BMC(IPMI).

 Fix yet another NVM bank detect problem in wm(4). Use bank 0 if the detect
function failed. It's the same as FreeBSD. Observed and tested with Asus P8P67
Deluxe motherboard and tested by jnemeth.


To generate a diff of this commit:
cvs rdiff -u -r1.227.2.9 -r1.227.2.10 src/sys/dev/pci/if_wm.c
cvs rdiff -u -r1.46.2.4 -r1.46.2.5 src/sys/dev/pci/if_wmreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/if_wm.c
diff -u src/sys/dev/pci/if_wm.c:1.227.2.9 src/sys/dev/pci/if_wm.c:1.227.2.10
--- src/sys/dev/pci/if_wm.c:1.227.2.9	Sun Jul 14 20:39:13 2013
+++ src/sys/dev/pci/if_wm.c	Mon Jul 29 20:24:04 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_wm.c,v 1.227.2.9 2013/07/14 20:39:13 riz Exp $	*/
+/*	$NetBSD: if_wm.c,v 1.227.2.10 2013/07/29 20:24:04 jdc Exp $	*/
 
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.227.2.9 2013/07/14 20:39:13 riz Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.227.2.10 2013/07/29 20:24:04 jdc Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -570,6 +570,8 @@ static int	wm_get_swfw_semaphore(struct 
 static void	wm_put_swfw_semaphore(struct wm_softc *, uint16_t);
 static int	wm_get_swfwhw_semaphore(struct wm_softc *);
 static void	wm_put_swfwhw_semaphore(struct wm_softc *);
+static int	wm_get_hw_semaphore_82573(struct wm_softc *);
+static void	wm_put_hw_semaphore_82573(struct wm_softc *);
 
 static int	wm_read_eeprom_ich8(struct wm_softc *, int, int, uint16_t *);
 static int32_t	wm_ich8_cycle_init(struct wm_softc *);
@@ -1242,8 +1244,6 @@ wm_attach(device_t parent, device_t self
 		return;
 	}
 
-	wm_get_wakeup(sc);
-
 	/*
 	 * In addition, i82544 and later support I/O mapped indirect
 	 * register access.  It is not desirable (nor supported in
@@ -1538,26 +1538,6 @@ wm_attach(device_t parent, device_t self
 	 */
 	wm_reset(sc);
 
-	switch (sc->sc_type) {
-	case WM_T_82571:
-	case WM_T_82572:
-	case WM_T_82573:
-	case WM_T_82574:
-	case WM_T_82583:
-	case WM_T_80003:
-	case WM_T_ICH8:
-	case WM_T_ICH9:
-	case WM_T_ICH10:
-	case WM_T_PCH:
-	case WM_T_PCH2:
-	case WM_T_PCH_LPT:
-		if (wm_check_mng_mode(sc) != 0)
-			wm_get_hw_control(sc);
-		break;
-	default:
-		break;
-	}
-
 	/*
 	 * Get some information about the EEPROM.
 	 */
@@ -1694,6 +1674,28 @@ wm_attach(device_t parent, device_t self
 		    sc->sc_ee_addrbits, eetype);
 	}
 
+	switch (sc->sc_type) {
+	case WM_T_82571:
+	case WM_T_82572:
+	case WM_T_82573:
+	case WM_T_82574:
+	case WM_T_82583:
+	case WM_T_80003:
+	case WM_T_ICH8:
+	case WM_T_ICH9:
+	case WM_T_ICH10:
+	case WM_T_PCH:
+	case WM_T_PCH2:
+	case WM_T_PCH_LPT:
+		if (wm_check_mng_mode(sc) != 0) {
+			printf ("get hw control (1)\n");
+			wm_get_hw_control(sc);
+		}
+		break;
+	default:
+		break;
+	}
+	wm_get_wakeup(sc);
 	/*
 	 * Read the Ethernet address from the EEPROM, if not first found
 	 * in device properties.
@@ -4018,7 +4020,6 @@ wm_reset(struct wm_softc *sc)
 {
 	int phy_reset = 0;
 	uint32_t reg, mask;
-	int i;
 
 	/*
 	 * Allocate on-chip memory according to the MTU size.
@@ -4118,19 +4119,7 @@ wm_reset(struct wm_softc *sc)
 	case WM_T_82573:
 	case WM_T_82574:
 	case WM_T_82583:
-		i = 0;
-		reg = CSR_READ(sc, WMREG_EXTCNFCTR)
-		    | EXTCNFCTR_MDIO_SW_OWNERSHIP;
-		do {
-			CSR_WRITE(sc, WMREG_EXTCNFCTR,
-			    reg | EXTCNFCTR_MDIO_SW_OWNERSHIP);
-			reg = CSR_READ(sc, WMREG_EXTCNFCTR);
-			if ((reg & EXTCNFCTR_MDIO_SW_OWNERSHIP) != 0)
-				break;
-			reg |= EXTCNFCTR_MDIO_SW_OWNERSHIP;
-			delay(2*1000);
-			i++;
-		} while (i < WM_MDIO_OWNERSHIP_TIMEOUT);
+		wm_get_hw_semaphore_82573(sc);
 		break;
 	default:
 		break;
@@ -4231,6 +4220,16 @@ wm_reset(struct wm_softc *sc)
 		break;
 	}
 
+	/* Must release the MDIO ownership after MAC reset */
+	switch (sc->sc_type) {
+	case WM_T_82574:
+	case WM_T_82583:
+		wm_put_hw_semaphore_82573(sc);
+		break;
+	default:
+		break;
+	}
+
 	if (phy_reset != 0)
 		wm_get_cfg_done(sc);
 
@@ -7524,6 +7523,43 @@ wm_put_swfwhw_semaphore(struct wm_softc 
 }
 
 static int
+wm_get_hw_semaphore_82573(struct wm_softc *sc)
+{
+	int i = 0;
+	uint32_t reg;
+
+	reg = CSR_READ(sc, WMREG_EXTCNFCTR);
+	do {
+		CSR_WRITE(sc, WMREG_EXTCNFCTR,
+		    reg | EXTCNFCTR_MDIO_SW_OWNERSHIP);
+		reg = CSR_READ(sc, WMREG_EXTCNFCTR);
+		if ((reg & EXTCNFCTR_MDIO_SW_OWNERSHIP) != 0)
+			break;
+		delay(2*1000);
+		i++;
+	} while (i < WM_MDIO_OWNERSHIP_TIMEOUT);
+
+	if (i == WM_MDIO_OWNERSHIP_TIMEOUT) {
+		wm_put_hw_semaphore_82573(sc);
+		log(LOG_ERR, "%s: Driver can't access the PHY\n",
+		    device_xname(sc->sc_dev));
+		return -1;
+	}
+
+	return 0;
+}
+
+static void
+wm_put_hw_semaphore_82573(struct wm_softc *sc)
+{
+	uint32_t reg;
+
+	reg = CSR_READ(sc, WMREG_EXTCNFCTR);
+	reg &= ~EXTCNFCTR_MDIO_SW_OWNERSHIP;
+	CSR_WRITE(sc, WMREG_EXTCNFCTR, reg);
+}
+
+static int
 wm_valid_nvm_bank_detect_ich8lan(struct wm_softc *sc, unsigned int *bank)
 {
 	uint32_t eecd;
@@ -7560,7 +7596,8 @@ wm_valid_nvm_bank_detect_ich8lan(struct 
 		}
 	}
 
-	aprint_error_dev(sc->sc_dev, "EEPROM not present\n");
+	DPRINTF(WM_DEBUG_NVM, ("%s: No valid NVM bank present\n",
+		device_xname(sc->sc_dev)));
 	return -1;
 }
 
@@ -7592,7 +7629,7 @@ wm_read_eeprom_ich8(struct wm_softc *sc,
 	if (error) {
 		aprint_error_dev(sc->sc_dev, "%s: failed to detect NVM bank\n",
 		    __func__);
-		return error;
+		flash_bank = 0;
 	}
 
 	/*
@@ -7932,8 +7969,7 @@ wm_enable_mng_pass_thru(struct wm_softc 
 
 	DPRINTF(WM_DEBUG_MANAGE, ("%s: MANC (%08x)\n",
 		device_xname(sc->sc_dev), manc));
-	if (((manc & MANC_RECV_TCO_EN) == 0)
-	    || ((manc & MANC_EN_MAC_ADDR_FILTER) == 0))
+	if ((manc & MANC_RECV_TCO_EN) == 0)
 		return 0;
 
 	if ((sc->sc_flags & WM_F_ARC_SUBSYS_VALID) != 0) {
@@ -7943,6 +7979,17 @@ wm_enable_mng_pass_thru(struct wm_softc 
 		    && ((fwsm & FWSM_MODE_MASK)
 			== (MNG_ICH_IAMT_MODE << FWSM_MODE_SHIFT)))
 			return 1;
+	} else if ((sc->sc_type == WM_T_82574) || (sc->sc_type == WM_T_82583)){
+		uint16_t data;
+
+		factps = CSR_READ(sc, WMREG_FACTPS);
+		wm_read_eeprom(sc, EEPROM_OFF_CFG2, 1, &data);
+		DPRINTF(WM_DEBUG_MANAGE, ("%s: FACTPS = %08x, CFG2=%04x\n",
+			device_xname(sc->sc_dev), factps, data));
+		if (((factps & FACTPS_MNGCG) == 0)
+		    && ((data & EEPROM_CFG2_MNGM_MASK)
+			== (EEPROM_CFG2_MNGM_PT << EEPROM_CFG2_MNGM_SHIFT)))
+			return 1;
 	} else if (((manc & MANC_SMBUS_EN) != 0)
 	    && ((manc & MANC_ASF_EN) == 0))
 		return 1;
@@ -8435,6 +8482,7 @@ wm_release_manageability(struct wm_softc
 	if (sc->sc_flags & WM_F_HAS_MANAGE) {
 		uint32_t manc = CSR_READ(sc, WMREG_MANC);
 
+		manc |= MANC_ARP_EN;
 		if (sc->sc_type >= WM_T_82571)
 			manc &= ~MANC_EN_MNG2HOST;
 
@@ -8460,11 +8508,9 @@ wm_get_wakeup(struct wm_softc *sc)
 	case WM_T_82574:
 	case WM_T_82575:
 	case WM_T_82576:
-#if 0 /* XXX */
 	case WM_T_82580:
 	case WM_T_82580ER:
 	case WM_T_I350:
-#endif
 		if ((CSR_READ(sc, WMREG_FWSM) & FWSM_MODE_MASK) != 0)
 			sc->sc_flags |= WM_F_ARC_SUBSYS_VALID;
 		sc->sc_flags |= WM_F_ASF_FIRMWARE_PRES;

Index: src/sys/dev/pci/if_wmreg.h
diff -u src/sys/dev/pci/if_wmreg.h:1.46.2.4 src/sys/dev/pci/if_wmreg.h:1.46.2.5
--- src/sys/dev/pci/if_wmreg.h:1.46.2.4	Sun Jul 14 20:39:13 2013
+++ src/sys/dev/pci/if_wmreg.h	Mon Jul 29 20:24:04 2013
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_wmreg.h,v 1.46.2.4 2013/07/14 20:39:13 riz Exp $	*/
+/*	$NetBSD: if_wmreg.h,v 1.46.2.5 2013/07/29 20:24:04 jdc Exp $	*/
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -350,7 +350,11 @@ struct livengood_tcpip_ctxdesc {
 #define	EEPROM_CFG2_APM_PME	(1U << 15)
 #define	EEPROM_CFG2_SWDPIO_SHIFT 4
 #define	EEPROM_CFG2_SWDPIO_MASK	(0xf << EEPROM_CFG2_SWDPIO_SHIFT)
-#define	EEPROM_CFG2_MNGM_MASK	(3U << 13) /* Manageability Operation mode */
+#define	EEPROM_CFG2_MNGM_SHIFT	13	/* Manageability Operation mode */
+#define	EEPROM_CFG2_MNGM_MASK	(3U << EEPROM_CFG2_MNGM_SHIFT)
+#define	EEPROM_CFG2_MNGM_DIS	0
+#define	EEPROM_CFG2_MNGM_NCSI	1
+#define	EEPROM_CFG2_MNGM_PT	2
 
 #define	EEPROM_K1_CONFIG_ENABLE	0x01
 
@@ -870,8 +874,10 @@ struct livengood_tcpip_ctxdesc {
 #define	MANC_SMBUS_EN		0x00000001
 #define	MANC_ASF_EN		0x00000002
 #define	MANC_ARP_EN		0x00002000
+#define	MANC_RECV_TCO_RESET	0x00010000
 #define	MANC_RECV_TCO_EN	0x00020000
 #define	MANC_BLK_PHY_RST_ON_IDE	0x00040000
+#define	MANC_RECV_ALL		0x00080000
 #define	MANC_EN_MAC_ADDR_FILTER	0x00100000
 #define	MANC_EN_MNG2HOST	0x00200000
 

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