Module Name:    src
Committed By:   matt
Date:           Wed Aug 21 08:30:18 UTC 2013

Modified Files:
        src/sys/lib/libkern/arch/arm: clzsi2.S

Log Message:
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To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/lib/libkern/arch/arm/clzsi2.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/lib/libkern/arch/arm/clzsi2.S
diff -u src/sys/lib/libkern/arch/arm/clzsi2.S:1.5 src/sys/lib/libkern/arch/arm/clzsi2.S:1.6
--- src/sys/lib/libkern/arch/arm/clzsi2.S:1.5	Sun Aug 11 04:58:01 2013
+++ src/sys/lib/libkern/arch/arm/clzsi2.S	Wed Aug 21 08:30:18 2013
@@ -1,4 +1,4 @@
-/* $NetBSD: clzsi2.S,v 1.5 2013/08/11 04:58:01 matt Exp $ */
+/* $NetBSD: clzsi2.S,v 1.6 2013/08/21 08:30:18 matt Exp $ */
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -30,7 +30,6 @@
 #include <machine/asm.h>
 
 	.text
-ENTRY(__clzdi2)
 #ifdef __ARMEB__
 #define	HI	r0
 #define	LO	r1
@@ -39,22 +38,26 @@ ENTRY(__clzdi2)
 #define	LO	r0
 #endif
 #if defined(_ARM_ARCH_5)
-#ifdef __thumb__
-	cmp	HI, #0
-	beq	1f
+#if defined(__thumb__) && defined(_ARM_ARCH_T2)
+ENTRY(__clzdi2)
+	cbz	HI, 1f
 	clz	r0, HI		/* count leading zeros in high word */
 	RET
 1:	clz	r0, LO		/* yes, count in low word */
-	add	r0, r0, #32	/*      and add the bits in the high word */
+	adds	r0, r0, #32	/*      and add the bits in the high word */
 	RET
+END(__clzdi2)
 #else
+ARM_ENTRY(__clzdi2)
 	teq	HI, #0		/* high word all zero? */
 	clzne	r0, HI		/* count leading zeros in high word */
 	clzeq	r0, LO		/* yes, count in low word */
 	addeq	r0, r0, #32	/*      and add the bits in the high word */
 	RET
+END(__clzdi2)
 #endif
 #else
+ARM_ENTRY(__clzdi2)
 	movs	r3, HI
 	movne	r0, #31
 	bne	.L_clz
@@ -63,14 +66,20 @@ ENTRY(__clzdi2)
 	bne	.L_clz
 	mov	r0, #64
 	RET
-#endif
 END(__clzdi2)
+#endif
 
-ENTRY(__clzsi2)
 #if defined(_ARM_ARCH_5)
+#if defined(_ARM_ARCH_7)
+ENTRY(__clzsi2)
+#else
+ARM_ENTRY(__clzsi2)
+#endif
 	clz	r0, r0
 	RET
+END(__clzsi2)
 #else
+ARM_ENTRY(__clzsi2)
 	movs	r3, r0
 	moveq	r0, #32
 	RETc(eq)
@@ -115,5 +124,5 @@ ENTRY(__clzsi2)
 #endif
 #endif	/* __OPTIMIZE_SIZE__ */
 	RET
-#endif  /* _ARM_ARCH_5 */
 END(__clzsi2)
+#endif  /* _ARM_ARCH_5 */

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