Module Name: src
Committed By: matt
Date: Sat Feb 15 16:16:39 UTC 2014
Modified Files:
src/gnu/dist/binutils/gas/config [matt-nb5-mips64]: tc-arm.c
src/gnu/dist/binutils/opcodes [matt-nb5-mips64]: arm-dis.c
Log Message:
Add pli support
To generate a diff of this commit:
cvs rdiff -u -r1.5.32.1 -r1.5.32.2 src/gnu/dist/binutils/gas/config/tc-arm.c
cvs rdiff -u -r1.1.1.3.32.1 -r1.1.1.3.32.2 \
src/gnu/dist/binutils/opcodes/arm-dis.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/gnu/dist/binutils/gas/config/tc-arm.c
diff -u src/gnu/dist/binutils/gas/config/tc-arm.c:1.5.32.1 src/gnu/dist/binutils/gas/config/tc-arm.c:1.5.32.2
--- src/gnu/dist/binutils/gas/config/tc-arm.c:1.5.32.1 Wed Dec 18 14:07:30 2013
+++ src/gnu/dist/binutils/gas/config/tc-arm.c Sat Feb 15 16:16:39 2014
@@ -5521,7 +5521,7 @@ do_pld (char * str)
++str;
}
else /* [Rn] */
- inst.instruction |= INDEX_UP | PRE_INDEX;
+ inst.instruction |= INDEX_UP;
}
else /* [Rn, ...] */
{
@@ -5550,8 +5550,6 @@ do_pld (char * str)
inst.error = _("writeback used in preload instruction");
++ str;
}
-
- inst.instruction |= PRE_INDEX;
}
end_of_line (str);
@@ -10124,7 +10122,7 @@ static const struct asm_opcode insns[] =
{"qdsub", 0xe1600050, 5, ARM_EXT_V5ExP, do_qadd},
/* ARM Architecture 5TE. */
- {"pld", 0xf450f000, 0, ARM_EXT_V5E, do_pld},
+ {"pld", 0xf550f000, 0, ARM_EXT_V5E, do_pld},
{"ldrd", 0xe00000d0, 3, ARM_EXT_V5E, do_ldrd},
{"strd", 0xe00000f0, 3, ARM_EXT_V5E, do_ldrd},
@@ -10261,6 +10259,7 @@ static const struct asm_opcode insns[] =
{ "movt", 0xe3400000, 2, ARM_EXT_V7A, do_movwt},
{ "sbfx", 0xe7a00050, 4, ARM_EXT_V7A, do_bfx},
{ "ubfx", 0xe7e00050, 4, ARM_EXT_V7A, do_bfx},
+ { "pli", 0xf450f000, 0, ARM_EXT_V7A, do_pld},
/* Core FPA instruction set (V1). */
{"wfs", 0xee200110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
Index: src/gnu/dist/binutils/opcodes/arm-dis.c
diff -u src/gnu/dist/binutils/opcodes/arm-dis.c:1.1.1.3.32.1 src/gnu/dist/binutils/opcodes/arm-dis.c:1.1.1.3.32.2
--- src/gnu/dist/binutils/opcodes/arm-dis.c:1.1.1.3.32.1 Wed Dec 18 18:31:22 2013
+++ src/gnu/dist/binutils/opcodes/arm-dis.c Sat Feb 15 16:16:39 2014
@@ -82,6 +82,7 @@
%C print the PSR sub type.
%E print the LSB and WIDTH fields of a BFI or BFC instruction.
%F print the COUNT field of a LFM/SFM instruction.
+ %Y print address for pli instruction.
IWMMXT specific format options:
%<bitfield>g print as an iWMMXt 64-bit register
%<bitfield>G print as an iWMMXt general purpose or control register
@@ -130,6 +131,7 @@ static const struct arm_opcode arm_opcod
{ARM_EXT_V7A, 0xf57ff050, 0xfffffff0, "dsb\t%#0-3d"},
{ARM_EXT_V7A, 0xf57ff06f, 0xffffffff, "isb"},
{ARM_EXT_V7A, 0xf57ff060, 0xfffffff0, "isb\t%#0-3d"},
+ {ARM_EXT_V7A, 0xf450f000, 0xff70f000, "pli\t%Y"},
/* ARM V6Z instructions. */
{ARM_EXT_V6Z, 0x01600070, 0x0ff000f0, "smi%c\t%e"},
@@ -353,7 +355,7 @@ static const struct arm_opcode arm_opcod
/* V5E "El Segundo" Instructions. */
{ARM_EXT_V5E, 0x000000d0, 0x0e1000f0, "ldr%cd\t%12-15r, %s"},
{ARM_EXT_V5E, 0x000000f0, 0x0e1000f0, "str%cd\t%12-15r, %s"},
- {ARM_EXT_V5E, 0xf450f000, 0xfc70f000, "pld\t%a"},
+ {ARM_EXT_V5E, 0xf550f000, 0xff70f000, "pld\t%a"},
{ARM_EXT_V5ExP, 0x01000080, 0x0ff000f0, "smlabb%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V5ExP, 0x010000a0, 0x0ff000f0, "smlatb%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V5ExP, 0x010000c0, 0x0ff000f0, "smlabt%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
@@ -957,6 +959,9 @@ print_insn_arm (pc, info, given)
func (stream, "%%");
break;
+ case 'Y':
+ given |= 0x01000000;
+ /*FALLTHROUGH*/
case 'a':
if (((given & 0x000f0000) == 0x000f0000)
&& ((given & 0x02000000) == 0))
