Module Name:    src
Committed By:   matt
Date:           Thu Feb 27 09:39:00 UTC 2014

Modified Files:
        src/common/lib/libc/arch/arm/atomic: Makefile.inc atomic_cas_up.S
        src/common/lib/libc/atomic: atomic_init_testset.c

Log Message:
Add atomic_cas_64 support for ARM EABI on V5TE and V5TEJ cpus.
(strd is atomic).


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/common/lib/libc/arch/arm/atomic/Makefile.inc
cvs rdiff -u -r1.5 -r1.6 src/common/lib/libc/arch/arm/atomic/atomic_cas_up.S
cvs rdiff -u -r1.14 -r1.15 src/common/lib/libc/atomic/atomic_init_testset.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/common/lib/libc/arch/arm/atomic/Makefile.inc
diff -u src/common/lib/libc/arch/arm/atomic/Makefile.inc:1.18 src/common/lib/libc/arch/arm/atomic/Makefile.inc:1.19
--- src/common/lib/libc/arch/arm/atomic/Makefile.inc:1.18	Sat Feb 22 17:16:12 2014
+++ src/common/lib/libc/arch/arm/atomic/Makefile.inc	Thu Feb 27 09:39:00 2014
@@ -1,22 +1,13 @@
-#	$NetBSD: Makefile.inc,v 1.18 2014/02/22 17:16:12 martin Exp $
+#	$NetBSD: Makefile.inc,v 1.19 2014/02/27 09:39:00 matt Exp $
 
-ARMV6= ${CPUFLAGS:M-march=armv6*} ${CPUFLAGS:M-mcpu=arm11*}
-ARMV6+= ${CFLAGS:M-march=armv6*:} ${CFLAGS:M-mcpu=arm11*}
-ARMV6+= ${CPPFLAGS:M-march=armv6*:} ${CPPFLAGS:M-mcpu=arm11*}
-ARMV7= ${CPUFLAGS:M-march=armv7*} ${CPUFLAGS:M-mcpu=cortex*}
-ARMV7+= ${CFLAGS:M-march=armv7*:} ${CFLAGS:M-mcpu=cortex*}
-ARMV7+= ${CPPFLAGS:M-march=armv7*:} ${CPPFLAGS:M-mcpu=cortex*}
-.if empty(CFLAGS:M-march=*) && empty(CFLAGS:M-mcpu=*) \
-    && empty(CPPFLAGS:M-march=*) && empty(CPPFLAGS:M-mcpu=*) \
-    && empty(CPUFLAGS:M-march=*) && empty(CPUFLAGS:M-mcpu=*)
-ARMV6+= ${MACHINE_ARCH:Mearmv6*}
-ARMV7+= ${MACHINE_ARCH:Mearmv7*}
+.ifnmake obj
+.include "${NETBSDSRCDIR}/common/lib/libc/arch/arm/features.mk"
 .endif
 
 .if defined(LIB) && (${LIB} == "kern" || ${LIB} == "c" || ${LIB} == "pthread" \
 	|| ${LIB} == "rump")
 
-.if empty(ARMV6) && empty(ARMV7)
+.if "${FEAT_LDREX}" == "no"
 SRCS.atomic+=	atomic_add_32_cas.c atomic_add_32_nv_cas.c \
 		atomic_and_32_cas.c atomic_and_32_nv_cas.c \
 		atomic_dec_32_cas.c atomic_dec_32_nv_cas.c \
@@ -58,7 +49,7 @@ SRCS.atomic+=	sync_bool_compare_and_swap
 .if defined(LIB) && (${LIB} == "c" || ${LIB} == "pthread" || ${LIB} == "rump")
 
 SRCS.atomic+=	atomic_simplelock.c
-.if empty(ARMV7)
+.if "${FEAT_THUMB2}" == "no"
 CPUFLAGS.atomic_simplelock.c+=	-marm
 .endif
 
@@ -66,19 +57,22 @@ CPUFLAGS.atomic_simplelock.c+=	-marm
 
 .if defined(LIB) && (${LIB} == "c" || ${LIB} == "pthread")
 
-.if empty(ARMV6) && empty(ARMV7)
+.if "${FEAT_LDREX}" == "no"
 SRCS.atomic+=	atomic_init_testset.c
 SRCS.atomic+=	atomic_cas_up.S
 CPPFLAGS+= -D__HAVE_ASM_ATOMIC_CAS_UP
 CPPFLAGS+= -D__HAVE_ASM_ATOMIC_CAS_16_UP
 CPPFLAGS+= -D__HAVE_ASM_ATOMIC_CAS_8_UP
+.if "${FEAT_EABI}" == "yes" && "${FEAT_LDRD}" == "yes"
+CPPFLAGS+= -D__HAVE_ATOMIC_CAS_64_UP -D__HAVE_ASM_ATOMIC_CAS_64_UP
+.endif
 .else
 SRCS.atomic+=	atomic_init_cas.c
-.endif
+.endif #FEAT_LDREX
 
-.endif
+.endif #LIB
 
-.if !empty(ARMV6)
+.if "${FEAT_THUMB2}" == "no"
 .for f in ${SRCS.atomic:M*.S}
 CPUFLAGS.$f+=	-marm
 .endfor

Index: src/common/lib/libc/arch/arm/atomic/atomic_cas_up.S
diff -u src/common/lib/libc/arch/arm/atomic/atomic_cas_up.S:1.5 src/common/lib/libc/arch/arm/atomic/atomic_cas_up.S:1.6
--- src/common/lib/libc/arch/arm/atomic/atomic_cas_up.S:1.5	Mon Jan 27 18:05:24 2014
+++ src/common/lib/libc/arch/arm/atomic/atomic_cas_up.S	Thu Feb 27 09:39:00 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: atomic_cas_up.S,v 1.5 2014/01/27 18:05:24 matt Exp $	*/
+/*	$NetBSD: atomic_cas_up.S,v 1.6 2014/02/27 09:39:00 matt Exp $	*/
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -49,6 +49,24 @@ RAS_END_ASM_HIDDEN(_atomic_cas)
 1:	RET
 END(_atomic_cas_up)
 
+#if defined(__HAVE_ASM_ATOMIC_CAS_64_UP)
+ARM_ENTRY(_atomic_cas_64_up)
+	push	{r4-r5}
+	mov	ip, r0
+	ldrd	r4, r5, [sp]
+	.align	0
+RAS_START_ASM_HIDDEN(_atomic_cas_64)
+	ldrd	r0, r1, [ip]
+	cmp	r0, r2
+	cmpeq	r1, r3
+	strdeq	r4, r5, [ip]
+	.align	0
+RAS_END_ASM_HIDDEN(_atomic_cas_64)
+1:	pop	{r4-r5}
+	bx	lr
+END(_atomic_cas_64_up)
+#endif /* __HAVE_ASM_ATOMIC_64_UP */
+
 ENTRY(_atomic_cas_16_up)
 	mov	r3, r0
 	.align	0

Index: src/common/lib/libc/atomic/atomic_init_testset.c
diff -u src/common/lib/libc/atomic/atomic_init_testset.c:1.14 src/common/lib/libc/atomic/atomic_init_testset.c:1.15
--- src/common/lib/libc/atomic/atomic_init_testset.c:1.14	Mon Feb 24 17:18:27 2014
+++ src/common/lib/libc/atomic/atomic_init_testset.c	Thu Feb 27 09:39:00 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: atomic_init_testset.c,v 1.14 2014/02/24 17:18:27 martin Exp $	*/
+/*	$NetBSD: atomic_init_testset.c,v 1.15 2014/02/27 09:39:00 matt Exp $	*/
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__RCSID("$NetBSD: atomic_init_testset.c,v 1.14 2014/02/24 17:18:27 martin Exp $");
+__RCSID("$NetBSD: atomic_init_testset.c,v 1.15 2014/02/27 09:39:00 matt Exp $");
 
 #include "atomic_op_namespace.h"
 
@@ -69,6 +69,17 @@ static uint32_t (*_atomic_cas_fn)(volati
     _atomic_cas_up;
 RAS_DECL(_atomic_cas);
 
+#ifdef	__HAVE_ATOMIC_CAS_64_UP
+#ifdef	__HAVE_ASM_ATOMIC_CAS_64_UP
+extern uint64_t _atomic_cas_64_up(volatile uint64_t *, uint64_t, uint64_t);
+#else
+static uint64_t _atomic_cas_64_up(volatile uint64_t *, uint64_t, uint64_t);
+#endif
+static uint64_t (*_atomic_cas_64_fn)(volatile uint64_t *, uint64_t, uint64_t) =
+    _atomic_cas_64_up;
+RAS_DECL(_atomic_cas_64);
+#endif
+
 #ifdef	__HAVE_ASM_ATOMIC_CAS_16_UP
 extern uint16_t _atomic_cas_16_up(volatile uint16_t *, uint16_t, uint16_t);
 #else
@@ -107,6 +118,24 @@ _atomic_cas_up(volatile uint32_t *ptr, u
 }
 #endif
 
+#if defined(__HAVE_ATOMIC_CAS_64_UP) && !defined(__HAVE_ASM_ATOMIC_CAS_64_UP)
+static uint64_t
+_atomic_cas_64_up(volatile uint64_t *ptr, uint64_t old, uint64_t new)
+{
+	uint64_t ret;
+
+	RAS_START(_atomic_cas_64);
+	ret = *ptr;
+	if (__predict_false(ret != old)) {
+		return ret;
+	}
+	*ptr = new;
+	RAS_END(_atomic_cas_64);
+
+	return ret;
+}
+#endif
+
 #ifndef	__HAVE_ASM_ATOMIC_CAS_16_UP
 static uint16_t
 _atomic_cas_16_up(volatile uint16_t *ptr, uint16_t old, uint16_t new)
@@ -160,6 +189,25 @@ _atomic_cas_mp(volatile uint32_t *ptr, u
 	return ret;
 }
 
+#ifdef	__HAVE_ATOMIC_CAS_64_UP
+static uint64_t
+_atomic_cas_64_mp(volatile uint64_t *ptr, uint64_t old, uint64_t new)
+{
+	__cpu_simple_lock_t *lock;
+	uint64_t ret;
+
+	lock = &atomic_locks[HASH(ptr)];
+	__cpu_simple_lock(lock);
+	ret = *ptr;
+	if (__predict_true(ret == old)) {
+		*ptr = new;
+	}
+	__cpu_simple_unlock(lock);
+
+	return ret;
+}
+#endif
+
 static uint16_t
 _atomic_cas_16_mp(volatile uint16_t *ptr, uint16_t old, uint16_t new)
 {
@@ -201,7 +249,16 @@ _atomic_cas_32(volatile uint32_t *ptr, u
 	return (*_atomic_cas_fn)(ptr, old, new);
 }
 
-uint16_t _atomic_cas_16(volatile uint16_t *, uint16_t, uint16_t);
+#ifdef	__HAVE_ATOMIC_CAS_64_UP
+uint64_t _atomic_cas_64(volatile uint64_t *, uint64_t, uint64_t);
+
+uint64_t
+_atomic_cas_64(volatile uint64_t *ptr, uint64_t old, uint64_t new)
+{
+
+	return (*_atomic_cas_64_fn)(ptr, old, new);
+}
+#endif
 
 uint16_t
 _atomic_cas_16(volatile uint16_t *ptr, uint16_t old, uint16_t new)
@@ -226,6 +283,9 @@ __libc_atomic_init(void)
 	size_t len;
 
 	_atomic_cas_fn = _atomic_cas_mp;
+#ifdef	__HAVE_ATOMIC_CAS_64_UP
+	_atomic_cas_64_fn = _atomic_cas_64_mp;
+#endif
 	_atomic_cas_16_fn = _atomic_cas_16_mp;
 	_atomic_cas_8_fn = _atomic_cas_8_mp;
 
@@ -242,6 +302,14 @@ __libc_atomic_init(void)
 		return;
 	}
 
+#ifdef	__HAVE_ATOMIC_CAS_64_UP
+	if (rasctl(RAS_ADDR(_atomic_cas_64), RAS_SIZE(_atomic_cas_64),
+	    RAS_INSTALL) == 0) {
+		_atomic_cas_64_fn = _atomic_cas_64_up;
+		return;
+	}
+#endif
+
 	if (rasctl(RAS_ADDR(_atomic_cas_16), RAS_SIZE(_atomic_cas_16),
 	    RAS_INSTALL) == 0) {
 		_atomic_cas_16_fn = _atomic_cas_16_up;
@@ -281,6 +349,14 @@ __strong_alias(_atomic_cas_ulong_ni,_ato
 atomic_op_alias(atomic_cas_ptr_ni,_atomic_cas_32)
 __strong_alias(_atomic_cas_ptr_ni,_atomic_cas_32)
 
+//atomic_op_alias(atomic_cas_16,_atomic_cas_16)
+//atomic_op_alias(atomic_cas_16_ni,_atomic_cas_16)
+//atomic_op_alias(atomic_cas_8,_atomic_cas_8)
+//atomic_op_alias(atomic_cas_8_ni,_atomic_cas_8)
+#ifdef	__HAVE_ATOMIC_CAS_64_UP
+//atomic_op_alias(atomic_cas_64_ni,_atomic_cas_64)
+crt_alias(__sync_val_compare_and_swap_8,_atomic_cas_64)
+#endif
 crt_alias(__sync_val_compare_and_swap_4,_atomic_cas_32)
 crt_alias(__sync_val_compare_and_swap_2,_atomic_cas_16)
 crt_alias(__sync_val_compare_and_swap_1,_atomic_cas_8)

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