Module Name: src
Committed By: reinoud
Date: Sat Apr 19 16:43:08 UTC 2014
Modified Files:
src/sys/arch/arm/samsung: exynos_reg.h exynos_wdt.c
Log Message:
Move the watchdog registers back to the exynos_reg.h
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/samsung/exynos_reg.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/samsung/exynos_wdt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/samsung/exynos_reg.h
diff -u src/sys/arch/arm/samsung/exynos_reg.h:1.2 src/sys/arch/arm/samsung/exynos_reg.h:1.3
--- src/sys/arch/arm/samsung/exynos_reg.h:1.2 Fri Apr 18 14:32:49 2014
+++ src/sys/arch/arm/samsung/exynos_reg.h Sat Apr 19 16:43:08 2014
@@ -95,9 +95,6 @@
/* standard block size for offsets defined below */
#define EXYNOS_BLOCK_SIZE 0x00010000
-/* standard frequency settings */
-#define EXYNOS_ACLK_REF_FREQ (200*1000*1000) /* 200 Mhz */
-#define EXYNOS_UART_FREQ (109*1000*1000) /* should be EXYNOS_ACLK_REF_FREQ! */
#if defined(EXYNOS5)
#include <arm/samsung/exynos5_reg.h>
@@ -106,4 +103,28 @@
#include <arm/samsung/exynos4_reg.h>
#endif
+
+/* standard frequency settings */
+#define EXYNOS_ACLK_REF_FREQ (200*1000*1000) /* 200 Mhz */
+#define EXYNOS_UART_FREQ (109*1000*1000) /* should be EXYNOS_ACLK_REF_FREQ! */
+
+
+/* Watchdog register definitions */
+#define EXYNOS_WDT_WTCON 0x0000
+#define WTCON_PRESCALER __BITS(15,8)
+#define WTCON_ENABLE __BIT(5)
+#define WTCON_CLOCK_SELECT __BITS(4,3)
+#define WTCON_CLOCK_SELECT_16 __SHIFTIN(0, WTCON_CLOCK_SELECT)
+#define WTCON_CLOCK_SELECT_32 __SHIFTIN(1, WTCON_CLOCK_SELECT)
+#define WTCON_CLOCK_SELECT_64 __SHIFTIN(2, WTCON_CLOCK_SELECT)
+#define WTCON_CLOCK_SELECT_128 __SHIFTIN(3, WTCON_CLOCK_SELECT)
+#define WTCON_INT_ENABLE __BIT(2)
+#define WTCON_RESET_ENABLE __BIT(0)
+#define EXYNOS_WDT_WTDAT 0x0004
+#define WTDAT_RELOAD __BITS(15,0)
+#define EXYNOS_WDT_WTCNT 0x0008
+#define WTCNT_COUNT __BITS(15,0)
+#define EXYNOS_WDT_WTCLRINT 0x000C
+
+
#endif /* _ARM_SAMSUNG_EXYNOS_REG_H_ */
Index: src/sys/arch/arm/samsung/exynos_wdt.c
diff -u src/sys/arch/arm/samsung/exynos_wdt.c:1.3 src/sys/arch/arm/samsung/exynos_wdt.c:1.4
--- src/sys/arch/arm/samsung/exynos_wdt.c:1.3 Sat Apr 19 15:30:41 2014
+++ src/sys/arch/arm/samsung/exynos_wdt.c Sat Apr 19 16:43:08 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_wdt.c,v 1.3 2014/04/19 15:30:41 reinoud Exp $ */
+/* $NetBSD: exynos_wdt.c,v 1.4 2014/04/19 16:43:08 reinoud Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#include "exynos_wdt.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: exynos_wdt.c,v 1.3 2014/04/19 15:30:41 reinoud Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_wdt.c,v 1.4 2014/04/19 16:43:08 reinoud Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -48,24 +48,6 @@ __KERNEL_RCSID(0, "$NetBSD: exynos_wdt.c
#include <arm/samsung/exynos_var.h>
-/* Watchdog register definitions */
-#define EXYNOS_WDT_WTCON 0x0000
-#define WTCON_PRESCALER __BITS(15,8)
-#define WTCON_ENABLE __BIT(5)
-#define WTCON_CLOCK_SELECT __BITS(4,3)
-#define WTCON_CLOCK_SELECT_16 __SHIFTIN(0, WTCON_CLOCK_SELECT)
-#define WTCON_CLOCK_SELECT_32 __SHIFTIN(1, WTCON_CLOCK_SELECT)
-#define WTCON_CLOCK_SELECT_64 __SHIFTIN(2, WTCON_CLOCK_SELECT)
-#define WTCON_CLOCK_SELECT_128 __SHIFTIN(3, WTCON_CLOCK_SELECT)
-#define WTCON_INT_ENABLE __BIT(2)
-#define WTCON_RESET_ENABLE __BIT(0)
-#define EXYNOS_WDT_WTDAT 0x0004
-#define WTDAT_RELOAD __BITS(15,0)
-#define EXYNOS_WDT_WTCNT 0x0008
-#define WTCNT_COUNT __BITS(15,0)
-#define EXYNOS_WDT_WTCLRINT 0x000C
-
-
#if NEXYNOS_WDT > 0
static int exynos_wdt_match(device_t, cfdata_t, void *);
static void exynos_wdt_attach(device_t, device_t, void *);
@@ -306,3 +288,4 @@ exynos_wdt_reset(void)
bus_space_write_4(bst, bsh, wdt_offset + EXYNOS_WDT_WTCON,
WTCON_ENABLE | WTCON_RESET_ENABLE);
}
+
