Module Name: src
Committed By: reinoud
Date: Fri Jun 6 14:37:04 UTC 2014
Modified Files:
src/sys/arch/arm/samsung: exynos5_reg.h
Log Message:
Correct c&p error on XHCI* registers and remove old cruft copied from the
datasheet that apparently is not used.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/samsung/exynos5_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/samsung/exynos5_reg.h
diff -u src/sys/arch/arm/samsung/exynos5_reg.h:1.6 src/sys/arch/arm/samsung/exynos5_reg.h:1.7
--- src/sys/arch/arm/samsung/exynos5_reg.h:1.6 Fri Jun 6 14:25:19 2014
+++ src/sys/arch/arm/samsung/exynos5_reg.h Fri Jun 6 14:37:04 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos5_reg.h,v 1.6 2014/06/06 14:25:19 reinoud Exp $ */
+/* $NetBSD: exynos5_reg.h,v 1.7 2014/06/06 14:37:04 reinoud Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -122,27 +122,9 @@
#define EXYNOS5_JPEG_OFFSET 0x01E00000
#define EXYNOS5_SYSMMU_JPEG_OFFSET 0x01F20000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET00 0x02000000
-#define EXYNOS5_USB3_XHCI0_OFFSET 0x02100000
-#if 0
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET01 0x02010000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET02 0x02020000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET03 0x02030000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET04 0x02040000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET05 0x02050000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET06 0x02060000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET07 0x02070000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET08 0x02080000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET09 0x02090000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET10 0x020A0000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET11 0x020B0000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET12 0x020C0000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET13 0x020D0000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET14 0x020E0000
-#define EXYNOS5_USB3_DEVICE_LINK_OFFSET15 0x020F0000
-#define EXYNOS5_USB3_DEVICE_CTRL_OFFSET 0x02100000
-#endif
+#define EXYNOS5_USB3_XHCI0_OFFSET 0x02000000
#define EXYNOS5_USB3_PHY0_OFFSET 0x02100000
+
#define EXYNOS5_USB2_HOST_EHCI_OFFSET 0x02110000
#define EXYNOS5_USB2_HOST_OHCI_OFFSET 0x02120000
#define EXYNOS5_USB2_HOST_CTRL_OFFSET 0x02130000
@@ -174,7 +156,7 @@
#define EXYNOS5_AS_A_IOP_FD64X_OFFSET 0x02380000
#define EXYNOS5_AS_A_AUDIO_OFFSET 0x02390000
-#define EXYNOS5_USB3_XHCI1_OFFSET 0x02100000
+#define EXYNOS5_USB3_XHCI1_OFFSET 0x02400000
#define EXYNOS5_USB3_PHY1_OFFSET 0x02500000
#if 0
