Module Name: src
Committed By: msaitoh
Date: Tue Jul 1 17:11:35 UTC 2014
Modified Files:
src/sys/dev/pci: if_bnx.c if_bnxreg.h if_bnxvar.h
Log Message:
Print some information (ASCI revision, PCI status, etc). Ffrom FreeBSD.
To generate a diff of this commit:
cvs rdiff -u -r1.55 -r1.56 src/sys/dev/pci/if_bnx.c
cvs rdiff -u -r1.17 -r1.18 src/sys/dev/pci/if_bnxreg.h
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/pci/if_bnxvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_bnx.c
diff -u src/sys/dev/pci/if_bnx.c:1.55 src/sys/dev/pci/if_bnx.c:1.56
--- src/sys/dev/pci/if_bnx.c:1.55 Tue Jul 1 15:23:35 2014
+++ src/sys/dev/pci/if_bnx.c Tue Jul 1 17:11:35 2014
@@ -1,8 +1,8 @@
-/* $NetBSD: if_bnx.c,v 1.55 2014/07/01 15:23:35 msaitoh Exp $ */
+/* $NetBSD: if_bnx.c,v 1.56 2014/07/01 17:11:35 msaitoh Exp $ */
/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
/*-
- * Copyright (c) 2006 Broadcom Corporation
+ * Copyright (c) 2006-2010 Broadcom Corporation
* David Christensen <davi...@broadcom.com>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -35,7 +35,7 @@
#if 0
__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
#endif
-__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.55 2014/07/01 15:23:35 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.56 2014/07/01 17:11:35 msaitoh Exp $");
/*
* The following controllers are supported by this driver:
@@ -360,6 +360,8 @@ void bnx_load_cpu_fw(struct bnx_softc *,
struct fw_info *);
void bnx_init_cpus(struct bnx_softc *);
+static void bnx_print_adapter_info(struct bnx_softc *);
+static void bnx_probe_pci_caps(struct bnx_softc *);
void bnx_stop(struct ifnet *, int);
int bnx_reset(struct bnx_softc *, uint32_t);
int bnx_chipinit(struct bnx_softc *);
@@ -445,6 +447,99 @@ bnx_probe(device_t parent, cfdata_t matc
}
/****************************************************************************/
+/* PCI Capabilities Probe Function. */
+/* */
+/* Walks the PCI capabiites list for the device to find what features are */
+/* supported. */
+/* */
+/* Returns: */
+/* None. */
+/****************************************************************************/
+static void
+bnx_print_adapter_info(struct bnx_softc *sc)
+{
+
+ aprint_normal_dev(sc->bnx_dev, "ASIC BCM%x %c%d %s(0x%08x)\n",
+ BNXNUM(sc), 'A' + BNXREV(sc), BNXMETAL(sc),
+ (BNX_CHIP_BOND_ID(sc) == BNX_CHIP_BOND_ID_SERDES_BIT)
+ ? "Serdes " : "", sc->bnx_chipid);
+
+ /* Bus info. */
+ if (sc->bnx_flags & BNX_PCIE_FLAG) {
+ aprint_normal_dev(sc->bnx_dev, "PCIe x%d ",
+ sc->link_width);
+ switch (sc->link_speed) {
+ case 1: aprint_normal("2.5Gbps\n"); break;
+ case 2: aprint_normal("5Gbps\n"); break;
+ default: aprint_normal("Unknown link speed\n");
+ }
+ } else {
+ aprint_normal_dev(sc->bnx_dev, "PCI%s %dbit %dMHz\n",
+ ((sc->bnx_flags & BNX_PCIX_FLAG) ? "-X" : ""),
+ (sc->bnx_flags & BNX_PCI_32BIT_FLAG) ? 32 : 64,
+ sc->bus_speed_mhz);
+ }
+
+ aprint_normal_dev(sc->bnx_dev,
+ "Coal (RX:%d,%d,%d,%d; TX:%d,%d,%d,%d)\n",
+ sc->bnx_rx_quick_cons_trip_int,
+ sc->bnx_rx_quick_cons_trip,
+ sc->bnx_rx_ticks_int,
+ sc->bnx_rx_ticks,
+ sc->bnx_tx_quick_cons_trip_int,
+ sc->bnx_tx_quick_cons_trip,
+ sc->bnx_tx_ticks_int,
+ sc->bnx_tx_ticks);
+}
+
+
+/****************************************************************************/
+/* PCI Capabilities Probe Function. */
+/* */
+/* Walks the PCI capabiites list for the device to find what features are */
+/* supported. */
+/* */
+/* Returns: */
+/* None. */
+/****************************************************************************/
+static void
+bnx_probe_pci_caps(struct bnx_softc *sc)
+{
+ struct pci_attach_args *pa = &(sc->bnx_pa);
+ pcireg_t reg;
+
+ /* Check if PCI-X capability is enabled. */
+ if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PCIX, ®,
+ NULL) != 0) {
+ sc->bnx_cap_flags |= BNX_PCIX_CAPABLE_FLAG;
+ }
+
+ /* Check if PCIe capability is enabled. */
+ if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PCIEXPRESS, ®,
+ NULL) != 0) {
+ pcireg_t link_status = pci_conf_read(pa->pa_pc, pa->pa_tag,
+ reg + PCIE_LCSR);
+ DBPRINT(sc, BNX_INFO_LOAD, "PCIe link_status = "
+ "0x%08X\n", link_status);
+ sc->link_speed = (link_status & PCIE_LCSR_LINKSPEED) >> 16;
+ sc->link_width = (link_status & PCIE_LCSR_NLW) >> 20;
+ sc->bnx_cap_flags |= BNX_PCIE_CAPABLE_FLAG;
+ sc->bnx_flags |= BNX_PCIE_FLAG;
+ }
+
+ /* Check if MSI capability is enabled. */
+ if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSI, ®,
+ NULL) != 0)
+ sc->bnx_cap_flags |= BNX_MSI_CAPABLE_FLAG;
+
+ /* Check if MSI-X capability is enabled. */
+ if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSIX, ®,
+ NULL) != 0)
+ sc->bnx_cap_flags |= BNX_MSIX_CAPABLE_FLAG;
+}
+
+
+/****************************************************************************/
/* Device attach function. */
/* */
/* Allocates device resources, performs secondary chip identification, */
@@ -552,6 +647,8 @@ bnx_attach(device_t parent, device_t sel
sc->bnx_flags = 0;
sc->bnx_phy_flags = 0;
+ bnx_probe_pci_caps(sc);
+
/* Get PCI bus information (speed and type). */
val = REG_RD(sc, BNX_PCICFG_MISC_STATUS);
if (val & BNX_PCICFG_MISC_STATUS_PCIX_DET) {
@@ -755,6 +852,8 @@ bnx_attach(device_t parent, device_t sel
else
aprint_error_dev(self, "couldn't establish power handler\n");
+ /* Finally, print some useful adapter info */
+ bnx_print_adapter_info(sc);
/* Print some important debugging info. */
DBRUN(BNX_INFO, bnx_dump_driver_state(sc));
Index: src/sys/dev/pci/if_bnxreg.h
diff -u src/sys/dev/pci/if_bnxreg.h:1.17 src/sys/dev/pci/if_bnxreg.h:1.18
--- src/sys/dev/pci/if_bnxreg.h:1.17 Tue Jul 1 15:23:35 2014
+++ src/sys/dev/pci/if_bnxreg.h Tue Jul 1 17:11:35 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bnxreg.h,v 1.17 2014/07/01 15:23:35 msaitoh Exp $ */
+/* $NetBSD: if_bnxreg.h,v 1.18 2014/07/01 17:11:35 msaitoh Exp $ */
/* $OpenBSD: if_bnxreg.h,v 1.33 2009/09/05 16:02:28 claudio Exp $ */
/*-
@@ -44,6 +44,7 @@
#define BNX_MFW_ENABLE_FLAG 0x40
#define BNX_ACTIVE_FLAG 0x80
#define BNX_ALLOC_PKTS_FLAG 0x100
+#define BNX_PCIE_FLAG 0x200
/* PHY specific flags -- bnx_phy_flags element in bnx_softc */
#define BNX_PHY_SERDES_FLAG 0x001
@@ -236,15 +237,9 @@
/* shorthand one */
-#define BNX_ASICREV(x) ((x) >> 28)
-#define BNX_ASICREV_BCM5700 0x06
-
-/* chip revisions */
-#define BNX_CHIPREV(x) ((x) >> 24)
-#define BNX_CHIPREV_5700_AX 0x70
-#define BNX_CHIPREV_5700_BX 0x71
-#define BNX_CHIPREV_5700_CX 0x72
-#define BNX_CHIPREV_5701_AX 0x00
+#define BNXNUM(sc) (BNX_CHIP_NUM(sc) >> 16)
+#define BNXREV(sc) (BNX_CHIP_REV(sc) >> 12)
+#define BNXMETAL(sc) (BNX_CHIP_METAL(sc) >> 4)
struct bnx_type {
uint16_t bnx_vid;
Index: src/sys/dev/pci/if_bnxvar.h
diff -u src/sys/dev/pci/if_bnxvar.h:1.5 src/sys/dev/pci/if_bnxvar.h:1.6
--- src/sys/dev/pci/if_bnxvar.h:1.5 Tue Jul 1 15:23:35 2014
+++ src/sys/dev/pci/if_bnxvar.h Tue Jul 1 17:11:35 2014
@@ -135,6 +135,13 @@ struct bnx_softc
/* General controller flags. */
uint32_t bnx_flags;
+ /* Controller capability flags. */
+ uint32_t bnx_cap_flags;
+#define BNX_MSI_CAPABLE_FLAG 0x00000001
+#define BNX_MSIX_CAPABLE_FLAG 0x00000002
+#define BNX_PCIE_CAPABLE_FLAG 0x00000004
+#define BNX_PCIX_CAPABLE_FLAG 0x00000008
+
/* PHY specific flags. */
uint32_t bnx_phy_flags;
@@ -143,9 +150,11 @@ struct bnx_softc
uint32_t bnx_port_hw_cfg;
uint16_t bus_speed_mhz; /* PCI bus speed */
- struct flash_spec *bnx_flash_info; /* Flash NVRAM settings */
+ uint16_t link_width; /* PCIe link width */
+ uint16_t link_speed; /* PCIe link speed */
+ struct flash_spec *bnx_flash_info; /* Flash NVRAM settings */
uint32_t bnx_flash_size; /* Flash NVRAM size */
- uint32_t bnx_shmem_base; /* Shared Memory base address */
+ uint32_t bnx_shmem_base;/* Shared Memory base address */
char * bnx_name; /* Name string */
/* Tracks the version of bootcode firmware. */
