Module Name: src
Committed By: skrll
Date: Sun Aug 24 21:42:06 UTC 2014
Modified Files:
src/sys/arch/arm/allwinner: awin_mmc.c awin_reg.h
Log Message:
Correct the mmc clock. Banana Pi can now find an SD card.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/allwinner/awin_mmc.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/allwinner/awin_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_mmc.c
diff -u src/sys/arch/arm/allwinner/awin_mmc.c:1.3 src/sys/arch/arm/allwinner/awin_mmc.c:1.4
--- src/sys/arch/arm/allwinner/awin_mmc.c:1.3 Wed Feb 26 02:01:02 2014
+++ src/sys/arch/arm/allwinner/awin_mmc.c Sun Aug 24 21:42:06 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_mmc.c,v 1.3 2014/02/26 02:01:02 jmcneill Exp $ */
+/* $NetBSD: awin_mmc.c,v 1.4 2014/08/24 21:42:06 skrll Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <[email protected]>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_mmc.c,v 1.3 2014/02/26 02:01:02 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_mmc.c,v 1.4 2014/08/24 21:42:06 skrll Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -87,7 +87,7 @@ struct awin_mmc_softc {
int sc_mmc_present;
device_t sc_sdmmc_dev;
- unsigned int sc_pll5_freq;
+ unsigned int sc_pll_freq;
unsigned int sc_mod_clk;
bool sc_has_gpio_detect;
@@ -129,7 +129,7 @@ awin_mmc_probe_clocks(struct awin_mmc_so
int n, k, p, div;
val = bus_space_read_4(aio->aio_core_bst, aio->aio_ccm_bsh,
- AWIN_PLL5_CFG_REG);
+ AWIN_PLL6_CFG_REG);
n = (val >> 8) & 0x1f;
k = ((val >> 4) & 3) + 1;
@@ -137,20 +137,16 @@ awin_mmc_probe_clocks(struct awin_mmc_so
freq = 24000000 * n * k / p;
- sc->sc_pll5_freq = freq;
- if (sc->sc_pll5_freq > 400000000) {
- div = 4;
- } else {
- div = 3;
- }
- sc->sc_mod_clk = sc->sc_pll5_freq / (div + 1);
+ sc->sc_pll_freq = freq;
+ div = ((sc->sc_pll_freq + 99999999) / 100000000) - 1;
+ sc->sc_mod_clk = sc->sc_pll_freq / (div + 1);
- awin_reg_set_clear(aio->aio_core_bst, aio->aio_ccm_bsh,
+ bus_space_write_4(aio->aio_core_bst, aio->aio_ccm_bsh,
AWIN_SD0_CLK_REG + (sc->sc_mmc_number * 8),
- AWIN_PLL_CFG_ENABLE | AWIN_PLL_CFG_EXG_MODE | div, 0);
+ AWIN_PLL_CFG_ENABLE | AWIN_PLL_CFG_PLL6 | div);
#ifdef AWIN_MMC_DEBUG
- aprint_normal_dev(sc->sc_dev, "PLL5 @ %u Hz\n", freq);
+ aprint_normal_dev(sc->sc_dev, "PLL6 @ %u Hz\n", freq);
#endif
}
Index: src/sys/arch/arm/allwinner/awin_reg.h
diff -u src/sys/arch/arm/allwinner/awin_reg.h:1.14 src/sys/arch/arm/allwinner/awin_reg.h:1.15
--- src/sys/arch/arm/allwinner/awin_reg.h:1.14 Sun Aug 3 19:14:24 2014
+++ src/sys/arch/arm/allwinner/awin_reg.h Sun Aug 24 21:42:06 2014
@@ -720,7 +720,8 @@
#define AWIN_PLL_CFG_ENABLE __BIT(31)
#define AWIN_PLL_CFG_BYPASS __BIT(30)
-#define AWIN_PLL_CFG_EXG_MODE __BIT(25)
+#define AWIN_PLL_CFG_PLL5 __BIT(25)
+#define AWIN_PLL_CFG_PLL6 __BIT(24)
#define AWIN_PLL_CFG_OUT_EXP_DIVP __BITS(17,16)
#define AWIN_PLL_CFG_FACTOR_N __BITS(12,8)
#define AWIN_PLL_CFG_FACTOR_K __BITS(5,4)
