Module Name: src
Committed By: jmcneill
Date: Sun Sep 7 14:16:44 UTC 2014
Modified Files:
src/sys/arch/arm/broadcom: bcm2835_obio.c files.bcm2835
Added Files:
src/sys/arch/arm/broadcom: bcm2835_dmac.c bcm2835_dmac.h
Log Message:
bcm2835 dma controller driver
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/broadcom/bcm2835_dmac.c \
src/sys/arch/arm/broadcom/bcm2835_dmac.h
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/broadcom/bcm2835_obio.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/broadcom/files.bcm2835
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm2835_obio.c
diff -u src/sys/arch/arm/broadcom/bcm2835_obio.c:1.20 src/sys/arch/arm/broadcom/bcm2835_obio.c:1.21
--- src/sys/arch/arm/broadcom/bcm2835_obio.c:1.20 Tue Apr 22 18:51:35 2014
+++ src/sys/arch/arm/broadcom/bcm2835_obio.c Sun Sep 7 14:16:44 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_obio.c,v 1.20 2014/04/22 18:51:35 kardel Exp $ */
+/* $NetBSD: bcm2835_obio.c,v 1.21 2014/09/07 14:16:44 jmcneill Exp $ */
/*-
* Copyright (c) 2012, 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_obio.c,v 1.20 2014/04/22 18:51:35 kardel Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_obio.c,v 1.21 2014/09/07 14:16:44 jmcneill Exp $");
#include "locators.h"
#include "obio.h"
@@ -105,6 +105,13 @@ static const struct ambadev_locators bcm
.ad_intr = -1,
},
{
+ /* DMA Controller */
+ .ad_name = "bcmdmac",
+ .ad_addr = BCM2835_DMA0_BASE,
+ .ad_size = BCM2835_DMA0_SIZE,
+ .ad_intr = -1,
+ },
+ {
/* Random number generator */
.ad_name = "bcmrng",
.ad_addr = BCM2835_RNG_BASE,
Index: src/sys/arch/arm/broadcom/files.bcm2835
diff -u src/sys/arch/arm/broadcom/files.bcm2835:1.21 src/sys/arch/arm/broadcom/files.bcm2835:1.22
--- src/sys/arch/arm/broadcom/files.bcm2835:1.21 Tue Apr 22 18:51:35 2014
+++ src/sys/arch/arm/broadcom/files.bcm2835 Sun Sep 7 14:16:44 2014
@@ -1,4 +1,4 @@
-# $NetBSD: files.bcm2835,v 1.21 2014/04/22 18:51:35 kardel Exp $
+# $NetBSD: files.bcm2835,v 1.22 2014/09/07 14:16:44 jmcneill Exp $
#
# Configuration info for Broadcom BCM2835 ARM Peripherals
#
@@ -54,6 +54,11 @@ file arch/arm/broadcom/bcm2835_plcom.c b
attach sdhc at obio with bcmemmc
file arch/arm/broadcom/bcm2835_emmc.c bcmemmc
+# DMA Controller (BCM2835_DMA0_BASE)
+device bcmdmac
+attach bcmdmac at obio with bcmdmac_amba
+file arch/arm/broadcom/bcm2835_dmac.c bcmdmac
+
# USB (BCM2835_USB_BASE)
attach dwctwo at obio with bcmdwctwo
file arch/arm/broadcom/bcm2835_dwctwo.c bcmdwctwo needs-flag
Added files:
Index: src/sys/arch/arm/broadcom/bcm2835_dmac.c
diff -u /dev/null src/sys/arch/arm/broadcom/bcm2835_dmac.c:1.1
--- /dev/null Sun Sep 7 14:16:44 2014
+++ src/sys/arch/arm/broadcom/bcm2835_dmac.c Sun Sep 7 14:16:44 2014
@@ -0,0 +1,293 @@
+/* $NetBSD: bcm2835_dmac.c,v 1.1 2014/09/07 14:16:44 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2014 Jared D. McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_ddb.h"
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_dmac.c,v 1.1 2014/09/07 14:16:44 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kmem.h>
+#include <sys/mutex.h>
+
+#include <arm/broadcom/bcm_amba.h>
+#include <arm/broadcom/bcm2835reg.h>
+#include <arm/broadcom/bcm2835_intr.h>
+
+#include <arm/broadcom/bcm2835_dmac.h>
+
+#define BCM_DMAC_CHANNELMASK 0x00000ff2
+
+struct bcm_dmac_softc;
+
+struct bcm_dmac_channel {
+ struct bcm_dmac_softc *ch_sc;
+ void *ch_ih;
+ uint8_t ch_index;
+ void (*ch_callback)(void *);
+ void *ch_callbackarg;
+ uint32_t ch_debug;
+};
+
+#define DMAC_CHANNEL_TYPE(ch) \
+ (((ch)->ch_debug & DMAC_DEBUG_LITE) ? \
+ BCM_DMAC_TYPE_LITE : BCM_DMAC_TYPE_NORMAL)
+#define DMAC_CHANNEL_USED(ch) \
+ ((ch)->ch_callback != NULL)
+
+struct bcm_dmac_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+ kmutex_t sc_lock;
+ struct bcm_dmac_channel *sc_channels;
+ int sc_nchannels;
+ uint32_t sc_channelmask;
+};
+
+#define DMAC_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))
+#define DMAC_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
+
+static int bcm_dmac_match(device_t, cfdata_t, void *);
+static void bcm_dmac_attach(device_t, device_t, void *);
+
+static int bcm_dmac_intr(void *);
+
+#if defined(DDB)
+void bcm_dmac_dump_regs(void);
+#endif
+
+CFATTACH_DECL_NEW(bcmdmac_amba, sizeof(struct bcm_dmac_softc),
+ bcm_dmac_match, bcm_dmac_attach, NULL, NULL);
+
+static int
+bcm_dmac_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct amba_attach_args *aaa = aux;
+
+ if (strcmp(aaa->aaa_name, "bcmdmac") != 0)
+ return 0;
+
+ if (aaa->aaa_addr != BCM2835_DMA0_BASE)
+ return 0;
+
+ return 1;
+}
+
+static void
+bcm_dmac_attach(device_t parent, device_t self, void *aux)
+{
+ struct bcm_dmac_softc *sc = device_private(self);
+ struct bcm_dmac_channel *ch;
+ struct amba_attach_args *aaa = aux;
+ uint32_t val;
+ int index;
+
+ sc->sc_dev = self;
+ sc->sc_iot = aaa->aaa_iot;
+
+ if (bus_space_map(aaa->aaa_iot, aaa->aaa_addr, aaa->aaa_size, 0,
+ &sc->sc_ioh)) {
+ aprint_error(": unable to map device\n");
+ return;
+ }
+
+ sc->sc_channelmask = BCM_DMAC_CHANNELMASK;
+ sc->sc_nchannels = 31 - __builtin_clz(sc->sc_channelmask);
+
+ mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SCHED);
+
+ sc->sc_nchannels = 31 - __builtin_clz(BCM_DMAC_CHANNELMASK);
+ sc->sc_channels = kmem_alloc(
+ sizeof(*sc->sc_channels) * sc->sc_nchannels, KM_SLEEP);
+ if (sc->sc_channels == NULL) {
+ aprint_error(": couldn't allocate channels\n");
+ return;
+ }
+
+ aprint_normal(":");
+ for (index = 0; index < sc->sc_nchannels; index++) {
+ ch = &sc->sc_channels[index];
+ ch->ch_sc = sc;
+ ch->ch_index = index;
+ ch->ch_callback = NULL;
+ ch->ch_callbackarg = NULL;
+ if ((index & sc->sc_channelmask) == 0)
+ continue;
+
+ aprint_normal(" DMA%d", index);
+
+ ch->ch_debug = DMAC_READ(sc, DMAC_DEBUG(index));
+
+ val = DMAC_READ(sc, DMAC_CS(index));
+ val |= DMAC_CS_RESET;
+ DMAC_WRITE(sc, DMAC_CS(index), val);
+
+ ch->ch_ih = bcm2835_intr_establish(BCM2835_INT_DMA0 + index,
+ IPL_SCHED, bcm_dmac_intr, ch);
+ if (ch->ch_ih == NULL) {
+ aprint_error("(err)");
+ sc->sc_channelmask &= ~__BIT(index);
+ }
+ }
+ aprint_normal("\n");
+ aprint_naive("\n");
+}
+
+static int
+bcm_dmac_intr(void *priv)
+{
+ struct bcm_dmac_channel *ch = priv;
+ struct bcm_dmac_softc *sc = ch->ch_sc;
+ uint32_t cs;
+
+ cs = DMAC_READ(sc, DMAC_CS(ch->ch_index));
+ if (!(cs & DMAC_CS_INTMASK))
+ return 0;
+
+ DMAC_WRITE(sc, DMAC_CS(ch->ch_index), cs);
+
+ if (ch->ch_callback)
+ ch->ch_callback(ch->ch_callbackarg);
+
+ return 1;
+}
+
+struct bcm_dmac_channel *
+bcm_dmac_alloc(enum bcm_dmac_type type, void (*cb)(void *), void *cbarg)
+{
+ struct bcm_dmac_softc *sc;
+ struct bcm_dmac_channel *ch = NULL;
+ device_t dev;
+ int index;
+
+ dev = device_find_by_driver_unit("bcmdmac", 0);
+ if (dev == NULL)
+ return NULL;
+ sc = device_private(dev);
+
+ mutex_enter(&sc->sc_lock);
+ for (index = 0; index < sc->sc_nchannels; index++) {
+ if ((sc->sc_channelmask & __BIT(index)) == 0)
+ continue;
+ if (DMAC_CHANNEL_TYPE(&sc->sc_channels[index]) != type)
+ continue;
+ if (DMAC_CHANNEL_USED(&sc->sc_channels[index]))
+ continue;
+
+ ch = &sc->sc_channels[index];
+ ch->ch_callback = cb;
+ ch->ch_callbackarg = cbarg;
+ break;
+ }
+ mutex_exit(&sc->sc_lock);
+
+ return ch;
+}
+
+void
+bcm_dmac_free(struct bcm_dmac_channel *ch)
+{
+ struct bcm_dmac_softc *sc = ch->ch_sc;
+ uint32_t val;
+
+ bcm_dmac_halt(ch);
+
+ val = DMAC_READ(sc, DMAC_CS(ch->ch_index));
+ val |= DMAC_CS_RESET;
+ val |= DMAC_CS_ABORT;
+ val &= ~DMAC_CS_ACTIVE;
+ DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);
+
+ mutex_enter(&sc->sc_lock);
+ ch->ch_callback = NULL;
+ ch->ch_callbackarg = NULL;
+ mutex_exit(&sc->sc_lock);
+}
+
+void
+bcm_dmac_set_conblk_addr(struct bcm_dmac_channel *ch, bus_addr_t addr)
+{
+ struct bcm_dmac_softc *sc = ch->ch_sc;
+
+ DMAC_WRITE(sc, DMAC_CONBLK_AD(ch->ch_index), addr);
+}
+
+int
+bcm_dmac_transfer(struct bcm_dmac_channel *ch)
+{
+ struct bcm_dmac_softc *sc = ch->ch_sc;
+ uint32_t val;
+
+ val = DMAC_READ(sc, DMAC_CS(ch->ch_index));
+ if (val & DMAC_CS_ACTIVE)
+ return EBUSY;
+
+ val |= DMAC_CS_ACTIVE;
+ DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val);
+
+ return 0;
+}
+
+void
+bcm_dmac_halt(struct bcm_dmac_channel *ch)
+{
+ bcm_dmac_set_conblk_addr(ch, 0);
+}
+
+#if defined(DDB)
+void
+bcm_dmac_dump_regs(void)
+{
+ struct bcm_dmac_softc *sc;
+ device_t dev;
+ int index;
+
+ dev = device_find_by_driver_unit("bcmdmac", 0);
+ if (dev == NULL)
+ return;
+ sc = device_private(dev);
+
+ for (index = 0; index < sc->sc_nchannels; index++) {
+ if ((sc->sc_channelmask & __BIT(index)) == 0)
+ continue;
+ printf("%d_CS: %08X\n", index,
+ DMAC_READ(sc, DMAC_CS(index)));
+ printf("%d_CONBLK_AD: %08X\n", index,
+ DMAC_READ(sc, DMAC_CONBLK_AD(index)));
+ printf("%d_DEBUG: %08X\n", index,
+ DMAC_READ(sc, DMAC_DEBUG(index)));
+ }
+}
+#endif
Index: src/sys/arch/arm/broadcom/bcm2835_dmac.h
diff -u /dev/null src/sys/arch/arm/broadcom/bcm2835_dmac.h:1.1
--- /dev/null Sun Sep 7 14:16:44 2014
+++ src/sys/arch/arm/broadcom/bcm2835_dmac.h Sun Sep 7 14:16:44 2014
@@ -0,0 +1,106 @@
+/* $NetBSD: bcm2835_dmac.h,v 1.1 2014/09/07 14:16:44 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2014 Jared D. McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef BCM2835_DMAC_H
+#define BCM2835_DMAC_H
+
+#define DMAC_CS(n) (0x00 + (0x100 * (n)))
+#define DMAC_CS_RESET __BIT(31)
+#define DMAC_CS_ABORT __BIT(30)
+#define DMAC_CS_DISDEBUG __BIT(29)
+#define DMAC_CS_WAIT_FOR_OUTSTANDING_WRITES __BIT(28)
+#define DMAC_CS_PANIC_PRIORITY __BITS(23,20)
+#define DMAC_CS_PRIORITY __BITS(19,16)
+#define DMAC_CS_ERROR __BIT(8)
+#define DMAC_CS_WAITING_FOR_OUTSTANDING_WRITES __BIT(6)
+#define DMAC_CS_DREQ_STOPS_DMA __BIT(5)
+#define DMAC_CS_PAUSED __BIT(4)
+#define DMAC_CS_DREQ __BIT(3)
+#define DMAC_CS_INT __BIT(2)
+#define DMAC_CS_END __BIT(1)
+#define DMAC_CS_ACTIVE __BIT(0)
+#define DMAC_CS_INTMASK (DMAC_CS_INT|DMAC_CS_END)
+#define DMAC_CONBLK_AD(n) (0x04 + (0x100 * (n)))
+#define DMAC_DEBUG(n) (0x20 + (0x100 * (n)))
+#define DMAC_DEBUG_LITE __BIT(28)
+#define DMAC_DEBUG_VERSION __BITS(27,25)
+#define DMAC_DEBUG_DMA_STATE __BITS(24,16)
+#define DMAC_DEBUG_DMA_ID __BITS(15,8)
+#define DMAC_DEBUG_OUTSTANDING_WRITES __BITS(7,4)
+#define DMAC_DEBUG_READ_ERROR __BIT(2)
+#define DMAC_DEBUG_FIFO_ERROR __BIT(1)
+#define DMAC_DEBUG_READ_LAST_NOT_SET_ERROR __BIT(0)
+
+struct bcm_dmac_conblk {
+ uint32_t cb_ti;
+#define DMAC_TI_NO_WIDE_BURSTS __BIT(26)
+#define DMAC_TI_WAITS __BITS(25,21)
+#define DMAC_TI_PERMAP __BITS(20,16)
+#define DMAC_TI_BURST_LENGTH __BITS(15,12)
+#define DMAC_TI_SRC_IGNORE __BIT(11)
+#define DMAC_TI_SRC_DREQ __BIT(10)
+#define DMAC_TI_SRC_WIDTH __BIT(9)
+#define DMAC_TI_SRC_INC __BIT(8)
+#define DMAC_TI_DEST_IGNORE __BIT(7)
+#define DMAC_TI_DEST_DREQ __BIT(6)
+#define DMAC_TI_DEST_WIDTH __BIT(5)
+#define DMAC_TI_DEST_INC __BIT(4)
+#define DMAC_TI_WAIT_RESP __BIT(3)
+#define DMAC_TI_TDMODE __BIT(1)
+#define DMAC_TI_INTEN __BIT(0)
+ uint32_t cb_source_ad;
+ uint32_t cb_dest_ad;
+ uint32_t cb_txfr_len;
+#define DMAC_TXFR_LEN_YLENGTH __BITS(29,16)
+#define DMAC_TXFR_LEN_XLENGTH __BITS(15,0)
+ uint32_t cb_stride;
+#define DMAC_STRIDE_D_STRIDE __BITS(31,16)
+#define DMAC_STRIDE_S_STRIDE __BITS(15,0)
+ uint32_t cb_nextconbk;
+ uint32_t cb_padding[2];
+} __packed;
+
+#define DMAC_INT_STATUS 0xfe0
+#define DMAC_ENABLE 0xff0
+
+enum bcm_dmac_type {
+ BCM_DMAC_TYPE_NORMAL,
+ BCM_DMAC_TYPE_LITE
+};
+
+struct bcm_dmac_channel;
+
+struct bcm_dmac_channel *bcm_dmac_alloc(enum bcm_dmac_type,
+ void (*)(void *), void *);
+void bcm_dmac_free(struct bcm_dmac_channel *);
+void bcm_dmac_set_conblk_addr(struct bcm_dmac_channel *, bus_addr_t);
+int bcm_dmac_transfer(struct bcm_dmac_channel *);
+void bcm_dmac_halt(struct bcm_dmac_channel *);
+
+
+#endif /* !BCM2835_DMAC_H */
