Module Name: src
Committed By: ryo
Date: Mon Oct 6 10:27:13 UTC 2014
Modified Files:
src/sys/arch/arm/imx: imx6_ahcisata.c imx6_board.c imx6_ccm.c
imx6_ccmreg.h
Log Message:
* resolve arm root clock from CCM to attach a9tmr
* don't match/attach imx6_ahcisata on iMX6 Solo/SoloLite/DualLite
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx6_ahcisata.c \
src/sys/arch/arm/imx/imx6_board.c src/sys/arch/arm/imx/imx6_ccm.c \
src/sys/arch/arm/imx/imx6_ccmreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/imx/imx6_ahcisata.c
diff -u src/sys/arch/arm/imx/imx6_ahcisata.c:1.1 src/sys/arch/arm/imx/imx6_ahcisata.c:1.2
--- src/sys/arch/arm/imx/imx6_ahcisata.c:1.1 Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_ahcisata.c Mon Oct 6 10:27:13 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ahcisata.c,v 1.1 2014/09/25 05:05:28 ryo Exp $ */
+/* $NetBSD: imx6_ahcisata.c,v 1.2 2014/10/06 10:27:13 ryo Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <[email protected]>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.1 2014/09/25 05:05:28 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.2 2014/10/06 10:27:13 ryo Exp $");
#include "locators.h"
#include "opt_imx.h"
@@ -73,10 +73,20 @@ imx6_ahcisata_match(device_t parent, cfd
{
struct axi_attach_args * const aa = aux;
- if (aa->aa_addr == IMX6_SATA_BASE)
- return 1;
+ if (aa->aa_addr != IMX6_SATA_BASE)
+ return 0;
- return 0;
+ /* i.MX6 Solo/SoloLite/DualLite has no SATA interface */
+ switch (IMX6_CHIPID_MAJOR(imx6_chip_id())) {
+ case CHIPID_MAJOR_IMX6SL:
+ case CHIPID_MAJOR_IMX6DL:
+ case CHIPID_MAJOR_IMX6SOLO:
+ return 0;
+ default:
+ break;
+ }
+
+ return 1;
}
static void
Index: src/sys/arch/arm/imx/imx6_board.c
diff -u src/sys/arch/arm/imx/imx6_board.c:1.1 src/sys/arch/arm/imx/imx6_board.c:1.2
--- src/sys/arch/arm/imx/imx6_board.c:1.1 Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_board.c Mon Oct 6 10:27:13 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_board.c,v 1.1 2014/09/25 05:05:28 ryo Exp $ */
+/* $NetBSD: imx6_board.c,v 1.2 2014/10/06 10:27:13 ryo Exp $ */
/*
* Copyright (c) 2012 Genetec Corporation. All rights reserved.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.1 2014/09/25 05:05:28 ryo Exp $");
+__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.2 2014/10/06 10:27:13 ryo Exp $");
#include "opt_imx.h"
#include "arml2cc.h"
@@ -45,8 +45,20 @@ __KERNEL_RCSID(1, "$NetBSD: imx6_board.c
#include <arm/imx/imx6var.h>
#include <arm/imx/imx6_reg.h>
#include <arm/imx/imx6_mmdcreg.h>
+#include <arm/imx/imx6_ccmreg.h>
+#include <arm/imx/imxclockvar.h>
#include <arm/imx/imxwdogreg.h>
+/*
+ * PERIPHCLK_N is an arm root clock divider for MPcore interupt controller.
+ * PERIPHCLK_N is equal to, or greater than two.
+ * see "Cortex-A9 MPCore Technical Reference Manual" -
+ * Chapter 5: Clocks, Resets, and Power Management, 5.1: Clocks.
+ */
+#ifndef PERIPHCLK_N
+#define PERIPHCLK_N 2
+#endif
+
bus_space_tag_t imx6_ioreg_bst = &imx_bs_tag;
bus_space_handle_t imx6_ioreg_bsh;
bus_space_tag_t imx6_armcore_bst = &imx_bs_tag;
@@ -77,6 +89,24 @@ imx6_bootstrap(vaddr_t iobase)
#endif
}
+/* iMX6 SoC type */
+uint32_t
+imx6_chip_id(void)
+{
+ uint32_t v;
+
+ /* read DIGPROG_SOLOLITE (IMX6SL only) */
+ v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+ AIPS1_CCM_BASE + USB_ANALOG_DIGPROG_SOLOLITE);
+ if (__SHIFTOUT(v, USB_ANALOG_DIGPROG_MAJOR) == CHIPID_MAJOR_IMX6SL)
+ return v;
+
+ /* not SOLOLITE, read DIGPROG */
+ v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+ AIPS1_CCM_BASE + USB_ANALOG_DIGPROG);
+ return v;
+}
+
/*
* probe DDR size from DDR Controller register
*/
@@ -150,6 +180,21 @@ imx6_reset(void)
__asm("wfi");
}
+uint32_t
+imx6_armrootclk(void)
+{
+ uint32_t clk;
+ uint32_t v;
+
+ v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+ AIPS1_CCM_BASE + CCM_ANALOG_PLL_ARM);
+ clk = IMX6_OSC_FREQ * (v & CCM_ANALOG_PLL_ARM_DIV_SELECT) / 2;
+ v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+ AIPS1_CCM_BASE + CCM_CACRR);
+ v = __SHIFTOUT(v, CCM_CACRR_ARM_PODF);
+ return clk / (v + 1);
+}
+
void
imx6_device_register(device_t self, void *aux)
{
@@ -174,7 +219,7 @@ imx6_device_register(device_t self, void
*/
if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
prop_dictionary_set_uint32(dict, "frequency",
- 792000000 / 2); /* XXX? */
+ imx6_armrootclk() / PERIPHCLK_N);
return;
}
}
Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.1 src/sys/arch/arm/imx/imx6_ccm.c:1.2
--- src/sys/arch/arm/imx/imx6_ccm.c:1.1 Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_ccm.c Mon Oct 6 10:27:13 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccm.c,v 1.1 2014/09/25 05:05:28 ryo Exp $ */
+/* $NetBSD: imx6_ccm.c,v 1.2 2014/10/06 10:27:13 ryo Exp $ */
/*
* Copyright (c) 2010-2012, 2014 Genetec Corporation. All rights reserved.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.1 2014/09/25 05:05:28 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.2 2014/10/06 10:27:13 ryo Exp $");
#include "opt_imx.h"
#include "opt_imx6clk.h"
@@ -55,10 +55,6 @@ __KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v
#include <arm/imx/imx6var.h>
#include <arm/imx/imx6_reg.h>
-#ifndef IMX6_OSC_FREQ
-#define IMX6_OSC_FREQ (24 * 1000 * 1000) /* 24MHz */
-#endif
-
struct imxccm_softc {
device_t sc_dev;
bus_space_tag_t sc_iot;
Index: src/sys/arch/arm/imx/imx6_ccmreg.h
diff -u src/sys/arch/arm/imx/imx6_ccmreg.h:1.1 src/sys/arch/arm/imx/imx6_ccmreg.h:1.2
--- src/sys/arch/arm/imx/imx6_ccmreg.h:1.1 Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_ccmreg.h Mon Oct 6 10:27:13 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccmreg.h,v 1.1 2014/09/25 05:05:28 ryo Exp $ */
+/* $NetBSD: imx6_ccmreg.h,v 1.2 2014/10/06 10:27:13 ryo Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <[email protected]>
@@ -31,6 +31,10 @@
#include <sys/cdefs.h>
+#ifndef IMX6_OSC_FREQ
+#define IMX6_OSC_FREQ (24 * 1000 * 1000) /* 24MHz */
+#endif
+
#define IMX6_CCM_SIZE 0x8000
/* 0x00000000 = 0x020c4000 */
@@ -240,8 +244,11 @@
#define USB_ANALOG_USB2_VBUS_DETECT_STAT 0x00004220
#define USB_ANALOG_USB2_CHRG_DETECT_STAT 0x00004230
#define USB_ANALOG_USB2_MISC 0x00004250
-#define USB_ANALOG_DIGPROG 0x00004260
+#define USB_ANALOG_DIGPROG 0x00004260
+#define USB_ANALOG_DIGPROG_SOLOLITE 0x00004280
+#define USB_ANALOG_DIGPROG_MAJOR __BITS(23, 8)
+#define USB_ANALOG_DIGPROG_MINOR __BITS(7, 0)
/* 0x00005000 = 0x020c9000 */
#define USBPHY1_PWD 0x00005000 /* = 020c9000 */
