Module Name:    src
Committed By:   msaitoh
Date:           Thu Oct 23 13:45:41 UTC 2014

Modified Files:
        src/sys/dev/pci: pcireg.h

Log Message:
 Add some HyperTransport related defines. It's required for the MSI.


To generate a diff of this commit:
cvs rdiff -u -r1.98 -r1.99 src/sys/dev/pci/pcireg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/pcireg.h
diff -u src/sys/dev/pci/pcireg.h:1.98 src/sys/dev/pci/pcireg.h:1.99
--- src/sys/dev/pci/pcireg.h:1.98	Thu Oct 23 09:57:37 2014
+++ src/sys/dev/pci/pcireg.h	Thu Oct 23 13:45:41 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: pcireg.h,v 1.98 2014/10/23 09:57:37 msaitoh Exp $	*/
+/*	$NetBSD: pcireg.h,v 1.99 2014/10/23 13:45:41 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1995, 1996, 1999, 2000
@@ -775,6 +775,35 @@ typedef u_int8_t pci_revision_t;
  * HyperTransport
  */
 
+#define PCI_HT_CMD	0x00	/* Capability List & Command Register */
+#define	PCI_HT_CMD_MASK		__BITS(31, 16)
+#define PCI_HT_MSI_ENABLED	__BIT(16)
+#define PCI_HT_MSI_FIXED	__BIT(17)
+#define PCI_HT_CAP(cr) ((((cr) >> 27) < 0x08) ?				      \
+    (((cr) >> 27) & 0x1c) : (((cr) >> 27) & 0x1f))
+#define PCI_HT_CAPMASK		__BITS(31, 27)
+#define PCI_HT_CAP_SLAVE	__SHIFTIN(0b00000, PCI_HT_CAPMASK) /* 000xx */
+#define PCI_HT_CAP_HOST		__SHIFTIN(0b00100, PCI_HT_CAPMASK) /* 001xx */
+#define PCI_HT_CAP_SWITCH	__SHIFTIN(0b01000, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_INTERRUPT	__SHIFTIN(0b10000, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_REVID	__SHIFTIN(0b10001, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_UNITID_CLUMP	__SHIFTIN(0b10010, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_EXTCNFSPACE	__SHIFTIN(0b10011, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_ADDRMAP	__SHIFTIN(0b10100, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_MSIMAP	__SHIFTIN(0b10101, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_DIRECTROUTE	__SHIFTIN(0b10110, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_VCSET	__SHIFTIN(0b10111, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_RETRYMODE	__SHIFTIN(0b11000, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_X86ENCODE	__SHIFTIN(0b11001, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_GEN3		__SHIFTIN(0b11010, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_FLE		__SHIFTIN(0b11011, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_PM		__SHIFTIN(0b11100, PCI_HT_CAPMASK)
+#define PCI_HT_CAP_HIGHNODECNT	__SHIFTIN(0b11101, PCI_HT_CAPMASK)
+
+#define PCI_HT_MSI_ADDR_LO	0x04
+#define PCI_HT_MSI_ADDR_HI	0x08
+#define PCI_HT_MSI_FIXED_ADDR	0xfee00000UL
+
 /*
  * Capability ID: 0x09
  * Vendor Specific

Reply via email to