Module Name: src
Committed By: martin
Date: Sat Dec 13 19:29:28 UTC 2014
Modified Files:
src/sys/arch/sparc64/include [netbsd-7]: psl.h
src/sys/arch/sparc64/sparc64 [netbsd-7]: cpu.c
Log Message:
Pull up following revision(s) (requested by nakayama in ticket #318):
sys/arch/sparc64/include/psl.h: revision 1.54
sys/arch/sparc64/include/psl.h: revision 1.55
sys/arch/sparc64/sparc64/cpu.c: revision 1.121
Make getver() into a constant function since Version Register (%ver)
is read only and its value is constant.
This change reduces multipule %ver reads to one in the functions
which uses a number of CPU_IS_* macros.
Use GETVER_CPU_* macros.
To generate a diff of this commit:
cvs rdiff -u -r1.53 -r1.53.4.1 src/sys/arch/sparc64/include/psl.h
cvs rdiff -u -r1.116 -r1.116.2.1 src/sys/arch/sparc64/sparc64/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/include/psl.h
diff -u src/sys/arch/sparc64/include/psl.h:1.53 src/sys/arch/sparc64/include/psl.h:1.53.4.1
--- src/sys/arch/sparc64/include/psl.h:1.53 Sun Aug 18 09:31:38 2013
+++ src/sys/arch/sparc64/include/psl.h Sat Dec 13 19:29:28 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: psl.h,v 1.53 2013/08/18 09:31:38 martin Exp $ */
+/* $NetBSD: psl.h,v 1.53.4.1 2014/12/13 19:29:28 martin Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -287,6 +287,13 @@
/*
* Inlines for manipulating privileged and ancillary state registers
*/
+#define SPARC64_RDCONST_DEF(rd, name, reg, type) \
+static __inline __constfunc type get##name(void) \
+{ \
+ type _val; \
+ __asm(#rd " %" #reg ",%0" : "=r" (_val)); \
+ return _val; \
+}
#define SPARC64_RD_DEF(rd, name, reg, type) \
static __inline type get##name(void) \
{ \
@@ -301,9 +308,19 @@ static __inline void set##name(type _val
}
#ifdef __arch64__
+#define SPARC64_RDCONST64_DEF(rd, name, reg) \
+ SPARC64_RDCONST_DEF(rd, name, reg, uint64_t)
#define SPARC64_RD64_DEF(rd, name, reg) SPARC64_RD_DEF(rd, name, reg, uint64_t)
#define SPARC64_WR64_DEF(wr, name, reg) SPARC64_WR_DEF(wr, name, reg, uint64_t)
#else
+#define SPARC64_RDCONST64_DEF(rd, name, reg) \
+static __inline __constfunc uint64_t get##name(void) \
+{ \
+ uint32_t _hi, _lo; \
+ __asm(#rd " %" #reg ",%0; srl %0,0,%1; srlx %0,32,%0" \
+ : "=r" (_hi), "=r" (_lo)); \
+ return ((uint64_t)_hi << 32) | _lo; \
+}
#define SPARC64_RD64_DEF(rd, name, reg) \
static __inline uint64_t get##name(void) \
{ \
@@ -345,13 +362,14 @@ SPARC64_RDPR_DEF(cwp, %cwp, int) /* get
SPARC64_WRPR_DEF(cwp, %cwp, int) /* setcwp() */
/* Version Register (PR 31) */
-SPARC64_RDPR64_DEF(ver, %ver) /* getver() */
+SPARC64_RDCONST64_DEF(rdpr, ver, %ver) /* getver() */
/* System Tick Register (ASR 24) */
SPARC64_RDASR64_DEF(stick, STICK) /* getstick() */
SPARC64_WRASR64_DEF(stick, STICK) /* setstick() */
/* Some simple macros to check the cpu type. */
+#define GETVER_CPU_MASK() ((getver() & VER_MASK) >> VER_MASK_SHIFT)
#define GETVER_CPU_IMPL() ((getver() & VER_IMPL) >> VER_IMPL_SHIFT)
#define GETVER_CPU_MANUF() ((getver() & VER_MANUF) >> VER_MANUF_SHIFT)
#define CPU_IS_SPITFIRE() (GETVER_CPU_IMPL() == IMPL_SPITFIRE)
Index: src/sys/arch/sparc64/sparc64/cpu.c
diff -u src/sys/arch/sparc64/sparc64/cpu.c:1.116 src/sys/arch/sparc64/sparc64/cpu.c:1.116.2.1
--- src/sys/arch/sparc64/sparc64/cpu.c:1.116 Fri Jul 25 18:29:45 2014
+++ src/sys/arch/sparc64/sparc64/cpu.c Sat Dec 13 19:29:28 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.116 2014/07/25 18:29:45 nakayama Exp $ */
+/* $NetBSD: cpu.c,v 1.116.2.1 2014/12/13 19:29:28 martin Exp $ */
/*
* Copyright (c) 1996
@@ -52,7 +52,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.116 2014/07/25 18:29:45 nakayama Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.116.2.1 2014/12/13 19:29:28 martin Exp $");
#include "opt_multiprocessor.h"
@@ -284,7 +284,6 @@ cpu_attach(device_t parent, device_t dev
struct cpu_info *ci;
const char *sep;
register int i, l;
- uint64_t ver;
int bigcache, cachesize;
char buf[100];
int totalsize = 0;
@@ -349,11 +348,10 @@ cpu_attach(device_t parent, device_t dev
aprint_normal(": %s, CPU id %d\n", buf, ci->ci_cpuid);
aprint_naive("\n");
if (CPU_ISSUN4U || CPU_ISSUN4US) {
- ver = getver();
aprint_normal_dev(dev, "manuf %x, impl %x, mask %x\n",
- (u_int)((ver & VER_MANUF) >> VER_MANUF_SHIFT),
- (u_int)((ver & VER_IMPL) >> VER_IMPL_SHIFT),
- (u_int)((ver & VER_MASK) >> VER_MASK_SHIFT));
+ (u_int)GETVER_CPU_MANUF(),
+ (u_int)GETVER_CPU_IMPL(),
+ (u_int)GETVER_CPU_MASK());
}
if (ci->ci_system_clockrate[0] != 0) {
@@ -495,7 +493,6 @@ int
cpu_myid(void)
{
char buf[32];
- int impl;
#ifdef SUN4V
if (CPU_ISSUN4V) {
@@ -507,8 +504,7 @@ cpu_myid(void)
if (OF_getprop(findroot(), "name", buf, sizeof(buf)) > 0 &&
strcmp(buf, "SUNW,Ultra-Enterprise-10000") == 0)
return lduwa(0x1fff40000d0UL, ASI_PHYS_NON_CACHED);
- impl = (getver() & VER_IMPL) >> VER_IMPL_SHIFT;
- switch (impl) {
+ switch (GETVER_CPU_IMPL()) {
case IMPL_OLYMPUS_C:
case IMPL_JUPITER:
return CPU_JUPITERID;
