Module Name: src
Committed By: jmcneill
Date: Sat Dec 27 02:12:30 UTC 2014
Modified Files:
src/sys/arch/arm/rockchip: rockchip_board.c rockchip_crureg.h
rockchip_var.h
Log Message:
add functions to get apll and cpu rates
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rockchip_board.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rockchip_crureg.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rockchip_var.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rockchip_board.c
diff -u src/sys/arch/arm/rockchip/rockchip_board.c:1.2 src/sys/arch/arm/rockchip/rockchip_board.c:1.3
--- src/sys/arch/arm/rockchip/rockchip_board.c:1.2 Sat Dec 27 01:21:21 2014
+++ src/sys/arch/arm/rockchip/rockchip_board.c Sat Dec 27 02:12:29 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_board.c,v 1.2 2014/12/27 01:21:21 jmcneill Exp $ */
+/* $NetBSD: rockchip_board.c,v 1.3 2014/12/27 02:12:29 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.2 2014/12/27 01:21:21 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.3 2014/12/27 02:12:29 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -64,27 +64,56 @@ rockchip_get_cru_bsh(bus_space_handle_t
ROCKCHIP_CRU_OFFSET, ROCKCHIP_CRU_SIZE, pbsh);
}
-u_int
-rockchip_gpll_get_rate(void)
+static u_int
+rockchip_pll_get_rate(bus_size_t con0_reg, bus_size_t con1_reg)
{
bus_space_tag_t bst = &rockchip_bs_tag;
bus_space_handle_t bsh;
- uint32_t gpll_con0, gpll_con1;
+ uint32_t pll_con0, pll_con1;
uint32_t nr, nf, no;
rockchip_get_cru_bsh(&bsh);
- gpll_con0 = bus_space_read_4(bst, bsh, CRU_GPLL_CON0_REG);
- gpll_con1 = bus_space_read_4(bst, bsh, CRU_GPLL_CON1_REG);
+ pll_con0 = bus_space_read_4(bst, bsh, con0_reg);
+ pll_con1 = bus_space_read_4(bst, bsh, con1_reg);
- nr = __SHIFTOUT(gpll_con0, CRU_PLL_CON0_CLKR) + 1;
- no = __SHIFTOUT(gpll_con0, CRU_PLL_CON0_CLKOD) + 1;
- nf = __SHIFTOUT(gpll_con1, CRU_PLL_CON1_CLKF) + 1;
+ nr = __SHIFTOUT(pll_con0, CRU_PLL_CON0_CLKR) + 1;
+ no = __SHIFTOUT(pll_con0, CRU_PLL_CON0_CLKOD) + 1;
+ nf = __SHIFTOUT(pll_con1, CRU_PLL_CON1_CLKF) + 1;
return ROCKCHIP_REF_FREQ * nf / (nr * no);
}
u_int
+rockchip_gpll_get_rate(void)
+{
+ return rockchip_pll_get_rate(CRU_GPLL_CON0_REG, CRU_GPLL_CON1_REG);
+}
+
+u_int
+rockchip_apll_get_rate(void)
+{
+ return rockchip_pll_get_rate(CRU_APLL_CON0_REG, CRU_APLL_CON1_REG);
+}
+
+u_int
+rockchip_cpu_get_rate(void)
+{
+ bus_space_tag_t bst = &rockchip_bs_tag;
+ bus_space_handle_t bsh;
+ uint32_t clksel_con0;
+
+ rockchip_get_cru_bsh(&bsh);
+
+ clksel_con0 = bus_space_read_4(bst, bsh, CRU_CLKSEL_CON_REG(0));
+ if (clksel_con0 & CRU_CLKSEL_CON0_CPU_CLK_PLL_SEL) {
+ return rockchip_gpll_get_rate();
+ } else {
+ return rockchip_apll_get_rate();
+ }
+}
+
+u_int
rockchip_ahb_get_rate(void)
{
bus_space_tag_t bst = &rockchip_bs_tag;
Index: src/sys/arch/arm/rockchip/rockchip_crureg.h
diff -u src/sys/arch/arm/rockchip/rockchip_crureg.h:1.1 src/sys/arch/arm/rockchip/rockchip_crureg.h:1.2
--- src/sys/arch/arm/rockchip/rockchip_crureg.h:1.1 Sat Dec 27 01:20:31 2014
+++ src/sys/arch/arm/rockchip/rockchip_crureg.h Sat Dec 27 02:12:29 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_crureg.h,v 1.1 2014/12/27 01:20:31 jmcneill Exp $ */
+/* $NetBSD: rockchip_crureg.h,v 1.2 2014/12/27 02:12:29 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <jmcne...@invisible.ca>
@@ -62,6 +62,13 @@
#define CRU_PLL_CON1_CLKF_MASK __BITS(28,16)
#define CRU_PLL_CON1_CLKF __BITS(12,0)
+#define CRU_CLKSEL_CON0_CPU_CLK_PLL_SEL_MASK __BIT(24)
+#define CRU_CLKSEL_CON0_CORE_PERI_DIV_CON_MASK __BITS(23,22)
+#define CRU_CLKSEL_CON0_A9_CORE_DIV_CON_MASK __BITS(20,16)
+#define CRU_CLKSEL_CON0_CPU_CLK_PLL_SEL __BIT(8)
+#define CRU_CLKSEL_CON0_CORE_PERI_DIV_CON __BITS(7,6)
+#define CRU_CLKSEL_CON0_A9_CORE_DIV_CON __BITS(4,0)
+
#define CRU_CLKSEL_CON10_PERI_PLL_SEL_MASK __BIT(31)
#define CRU_CLKSEL_CON10_PERI_PCLK_DIV_CON_MASK __BITS(29,28)
#define CRU_CLKSEL_CON10_PERI_HCLK_DIV_CON_MASK __BITS(25,24)
Index: src/sys/arch/arm/rockchip/rockchip_var.h
diff -u src/sys/arch/arm/rockchip/rockchip_var.h:1.3 src/sys/arch/arm/rockchip/rockchip_var.h:1.4
--- src/sys/arch/arm/rockchip/rockchip_var.h:1.3 Sat Dec 27 01:21:21 2014
+++ src/sys/arch/arm/rockchip/rockchip_var.h Sat Dec 27 02:12:29 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_var.h,v 1.3 2014/12/27 01:21:21 jmcneill Exp $ */
+/* $NetBSD: rockchip_var.h,v 1.4 2014/12/27 02:12:29 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -56,7 +56,9 @@ extern bus_space_handle_t rockchip_core1
void rockchip_bootstrap(void);
+u_int rockchip_apll_get_rate(void);
u_int rockchip_gpll_get_rate(void);
+u_int rockchip_cpu_get_rate(void);
u_int rockchip_ahb_get_rate(void);
#endif /* _ARM_ROCKCHIP_ROCKCHIP_VAR_H_ */
