Module Name: src
Committed By: riz
Date: Tue Mar 17 17:52:49 UTC 2015
Modified Files:
src/sys/dev/pci [netbsd-7]: agp_i810.c agp_i810var.h
src/sys/external/bsd/drm2/dist/drm/i915 [netbsd-7]: i915_gem.c
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock [netbsd-7]:
nouveau_subdev_clock_nv50.c
src/sys/external/bsd/drm2/drm [netbsd-7]: drm_drv.c drm_gem_vm.c
src/sys/external/bsd/drm2/i915drm [netbsd-7]: intel_gtt.c
src/sys/external/bsd/drm2/include/drm [netbsd-7]: intel-gtt.h
Log Message:
Pull up following revision(s) (requested by snj in ticket #590):
sys/external/bsd/drm2/i915drm/intel_gtt.c: revision 1.5
sys/external/bsd/drm2/drm/drm_drv.c: revision 1.15
sys/external/bsd/drm2/dist/drm/i915/i915_gem.c: revision 1.28
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c:
revision 1.3
sys/dev/pci/agp_i810.c: revision 1.115
sys/dev/pci/agp_i810.c: revision 1.116
sys/external/bsd/drm2/include/drm/intel-gtt.h: revision 1.5
sys/dev/pci/agp_i810.c: revision 1.117
sys/external/bsd/drm2/drm/drm_gem_vm.c: revision 1.6
sys/dev/pci/agp_i810var.h: revision 1.6
Issue a write barrier after updating the GTT.
Linux never used to do this...until a month:
<a rel="nofollow"
href="https://bugs.freedesktop.org/show_bug.cgi?id=88191";>https://bugs.freedesktop.org/show_bug.cgi?id=88191</a>
commit 983d308cb8f602d1920a8c40196eb2ab6cc07bd2
Author: Chris Wilson <chris%chris-wilson.co.uk@localhost>
Date: Mon Jan 26 10:47:10 2015 +0000
agp/intel: Serialise after GTT updates
Include <sys/atomic.h> for membar_producer.
(Why didn't this fail in my build?)
Pass cache-related flags through to the GTT on pre-SNB devices.
I had assumed for ages this would increase the amount of caching and
thereby increase the chance of stale caches leading to rendering
glitches. But apparently I was wrong, and failing to pass these
through was causing all sorts of problems!
Dedup the NetBSD portion of the code (ok Riastradh), no functional change.
Don't return events that are too large and leave them in the list.
Apply access control to gem mmap.
fix gcc is stupid.
To generate a diff of this commit:
cvs rdiff -u -r1.112.2.1 -r1.112.2.2 src/sys/dev/pci/agp_i810.c
cvs rdiff -u -r1.5 -r1.5.2.1 src/sys/dev/pci/agp_i810var.h
cvs rdiff -u -r1.14.2.6 -r1.14.2.7 \
src/sys/external/bsd/drm2/dist/drm/i915/i915_gem.c
cvs rdiff -u -r1.1.1.1.4.1 -r1.1.1.1.4.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c
cvs rdiff -u -r1.9.2.3 -r1.9.2.4 src/sys/external/bsd/drm2/drm/drm_drv.c
cvs rdiff -u -r1.5 -r1.5.2.1 src/sys/external/bsd/drm2/drm/drm_gem_vm.c
cvs rdiff -u -r1.4 -r1.4.2.1 src/sys/external/bsd/drm2/i915drm/intel_gtt.c
cvs rdiff -u -r1.4 -r1.4.2.1 \
src/sys/external/bsd/drm2/include/drm/intel-gtt.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/agp_i810.c
diff -u src/sys/dev/pci/agp_i810.c:1.112.2.1 src/sys/dev/pci/agp_i810.c:1.112.2.2
--- src/sys/dev/pci/agp_i810.c:1.112.2.1 Thu Sep 18 10:25:33 2014
+++ src/sys/dev/pci/agp_i810.c Tue Mar 17 17:52:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: agp_i810.c,v 1.112.2.1 2014/09/18 10:25:33 martin Exp $ */
+/* $NetBSD: agp_i810.c,v 1.112.2.2 2015/03/17 17:52:49 riz Exp $ */
/*-
* Copyright (c) 2000 Doug Rabson
@@ -30,10 +30,11 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.112.2.1 2014/09/18 10:25:33 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.112.2.2 2015/03/17 17:52:49 riz Exp $");
#include <sys/param.h>
#include <sys/systm.h>
+#include <sys/atomic.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/proc.h>
@@ -119,15 +120,23 @@ static struct agp_methods agp_i810_metho
};
int
-agp_i810_write_gtt_entry(struct agp_i810_softc *isc, off_t off, bus_addr_t v)
+agp_i810_write_gtt_entry(struct agp_i810_softc *isc, off_t off,
+ bus_addr_t addr, int flags)
{
u_int32_t pte;
- /* Bits 11:4 (physical start address extension) should be zero. */
- if ((v & 0xff0) != 0)
+ /*
+ * Bits 11:4 (physical start address extension) should be zero.
+ * Flag bits 3:0 should be zero too.
+ *
+ * XXX This should be a kassert -- no reason for this routine
+ * to allow failure.
+ */
+ if ((addr & 0xfff) != 0)
return EINVAL;
+ KASSERT(flags == (flags & 0x7));
- pte = (u_int32_t)v;
+ pte = (u_int32_t)addr;
/*
* We need to massage the pte if bus_addr_t is wider than 32 bits.
* The compiler isn't smart enough, hence the casts to uintmax_t.
@@ -137,17 +146,17 @@ agp_i810_write_gtt_entry(struct agp_i810
if (isc->chiptype == CHIP_I965 ||
isc->chiptype == CHIP_G33 ||
isc->chiptype == CHIP_G4X) {
- if (((uintmax_t)v >> 36) != 0)
+ if (((uintmax_t)addr >> 36) != 0)
return EINVAL;
- pte |= (v >> 28) & 0xf0;
+ pte |= (addr >> 28) & 0xf0;
} else {
- if (((uintmax_t)v >> 32) != 0)
+ if (((uintmax_t)addr >> 32) != 0)
return EINVAL;
}
}
bus_space_write_4(isc->gtt_bst, isc->gtt_bsh,
- 4*(off >> AGP_PAGE_SHIFT), pte);
+ 4*(off >> AGP_PAGE_SHIFT), pte | flags);
return 0;
}
@@ -156,6 +165,13 @@ void
agp_i810_post_gtt_entry(struct agp_i810_softc *isc, off_t off)
{
+ /*
+ * See <https://bugs.freedesktop.org/show_bug.cgi?id=88191>.
+ * Out of paranoia, let's do the write barrier and posting
+ * read, because I don't have enough time or hardware to
+ * conduct conclusive tests.
+ */
+ membar_producer();
(void)bus_space_read_4(isc->gtt_bst, isc->gtt_bsh,
4*(off >> AGP_PAGE_SHIFT));
}
@@ -1120,7 +1136,8 @@ agp_i810_bind_page(struct agp_softc *sc,
}
}
- return agp_i810_write_gtt_entry(isc, offset, physical | 1);
+ return agp_i810_write_gtt_entry(isc, offset, physical,
+ AGP_I810_GTT_VALID);
}
static int
@@ -1138,7 +1155,7 @@ agp_i810_unbind_page(struct agp_softc *s
}
}
- return agp_i810_write_gtt_entry(isc, offset, 0);
+ return agp_i810_write_gtt_entry(isc, offset, 0, 0);
}
/*
@@ -1314,9 +1331,6 @@ agp_i810_bind_memory(struct agp_softc *s
return 0;
}
-#define I810_GTT_PTE_VALID 0x01
-#define I810_GTT_PTE_DCACHE 0x02
-
static int
agp_i810_bind_memory_dcache(struct agp_softc *sc, struct agp_memory *mem,
off_t offset)
@@ -1330,7 +1344,7 @@ agp_i810_bind_memory_dcache(struct agp_s
KASSERT((mem->am_size & (AGP_PAGE_SIZE - 1)) == 0);
for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
error = agp_i810_write_gtt_entry(isc, offset + i,
- i | I810_GTT_PTE_VALID | I810_GTT_PTE_DCACHE);
+ i, AGP_I810_GTT_VALID | AGP_I810_GTT_I810_DCACHE);
if (error)
goto fail0;
}
Index: src/sys/dev/pci/agp_i810var.h
diff -u src/sys/dev/pci/agp_i810var.h:1.5 src/sys/dev/pci/agp_i810var.h:1.5.2.1
--- src/sys/dev/pci/agp_i810var.h:1.5 Tue Jun 10 14:00:56 2014
+++ src/sys/dev/pci/agp_i810var.h Tue Mar 17 17:52:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: agp_i810var.h,v 1.5 2014/06/10 14:00:56 riastradh Exp $ */
+/* $NetBSD: agp_i810var.h,v 1.5.2.1 2015/03/17 17:52:49 riz Exp $ */
/*-
* Copyright (c) 2000 Doug Rabson
@@ -67,6 +67,11 @@ struct agp_i810_softc {
extern struct agp_softc *agp_i810_sc;
-int agp_i810_write_gtt_entry(struct agp_i810_softc *, off_t, bus_addr_t);
+#define AGP_I810_GTT_VALID 0x01
+#define AGP_I810_GTT_I810_DCACHE 0x02 /* i810-only */
+#define AGP_I810_GTT_CACHED 0x06 /* >=i830 */
+
+int agp_i810_write_gtt_entry(struct agp_i810_softc *, off_t, bus_addr_t,
+ int);
void agp_i810_post_gtt_entry(struct agp_i810_softc *, off_t);
void agp_i810_chipset_flush(struct agp_i810_softc *);
Index: src/sys/external/bsd/drm2/dist/drm/i915/i915_gem.c
diff -u src/sys/external/bsd/drm2/dist/drm/i915/i915_gem.c:1.14.2.6 src/sys/external/bsd/drm2/dist/drm/i915/i915_gem.c:1.14.2.7
--- src/sys/external/bsd/drm2/dist/drm/i915/i915_gem.c:1.14.2.6 Fri Mar 6 21:39:08 2015
+++ src/sys/external/bsd/drm2/dist/drm/i915/i915_gem.c Tue Mar 17 17:52:49 2015
@@ -705,51 +705,21 @@ i915_gem_shmem_pread(struct drm_device *
offset = args->offset;
#ifdef __NetBSD__
- /*
- * XXX This is a big #ifdef with a lot of duplicated code, but
- * factoring out the loop head -- which is all that
- * substantially differs -- is probably more trouble than it's
- * worth at the moment.
- */
- while (0 < remain) {
- /* Get the next page. */
- shmem_page_offset = offset_in_page(offset);
- KASSERT(shmem_page_offset < PAGE_SIZE);
- page_length = MIN(remain, (PAGE_SIZE - shmem_page_offset));
+ while (0 < remain)
+#else
+ for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents,
+ offset >> PAGE_SHIFT)
+#endif
+ {
+#ifdef __NetBSD__
struct page *const page = i915_gem_object_get_page(obj,
atop(offset));
-
- /* Decide whether to swizzle bit 17. */
- page_do_bit17_swizzling = obj_do_bit17_swizzling &&
- (page_to_phys(page) & (1 << 17)) != 0;
-
- /* Try the fast path. */
- ret = shmem_pread_fast(page, shmem_page_offset, page_length,
- user_data, page_do_bit17_swizzling, needs_clflush);
- if (ret == 0)
- goto next_page;
-
- /* Fast path failed. Try the slow path. */
- mutex_unlock(&dev->struct_mutex);
- /* XXX prefault */
- ret = shmem_pread_slow(page, shmem_page_offset, page_length,
- user_data, page_do_bit17_swizzling, needs_clflush);
- mutex_lock(&dev->struct_mutex);
- if (ret)
- goto out;
-
-next_page: KASSERT(page_length <= remain);
- remain -= page_length;
- user_data += page_length;
- offset += page_length;
- }
#else
- for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents,
- offset >> PAGE_SHIFT) {
struct page *page = sg_page_iter_page(&sg_iter);
if (remain <= 0)
break;
+#endif
/* Operation in this page
*
@@ -771,7 +741,7 @@ next_page: KASSERT(page_length <= remain
goto next_page;
mutex_unlock(&dev->struct_mutex);
-
+#ifndef __NetBSD__
if (likely(!i915.prefault_disable) && !prefaulted) {
ret = fault_in_multipages_writeable(user_data, remain);
/* Userspace is tricking us, but we've already clobbered
@@ -781,7 +751,7 @@ next_page: KASSERT(page_length <= remain
(void)ret;
prefaulted = 1;
}
-
+#endif
ret = shmem_pread_slow(page, shmem_page_offset, page_length,
user_data, page_do_bit17_swizzling,
needs_clflush);
@@ -796,7 +766,6 @@ next_page:
user_data += page_length;
offset += page_length;
}
-#endif
out:
i915_gem_object_unpin_pages(obj);
@@ -1050,6 +1019,9 @@ i915_gem_shmem_pwrite(struct drm_device
int needs_clflush_before = 0;
#ifndef __NetBSD__
struct sg_page_iter sg_iter;
+ int flush_mask = boot_cpu_data.x86_clflush_size - 1;
+#else
+ int flush_mask = cpu_info_primary.ci_cflush_lsize - 1;
#endif
user_data = to_user_ptr(args->data_ptr);
@@ -1083,48 +1055,18 @@ i915_gem_shmem_pwrite(struct drm_device
obj->dirty = 1;
#ifdef __NetBSD__
- while (0 < remain) {
- /* Get the next page. */
- shmem_page_offset = offset_in_page(offset);
- KASSERT(shmem_page_offset < PAGE_SIZE);
- page_length = MIN(remain, (PAGE_SIZE - shmem_page_offset));
+ while (0 < remain)
+#else
+ for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents,
+ offset >> PAGE_SHIFT)
+#endif
+ {
+#ifdef __NetBSD__
struct page *const page = i915_gem_object_get_page(obj,
atop(offset));
-
- /* Decide whether to flush the cache or swizzle bit 17. */
- const bool partial_cacheline_write = needs_clflush_before &&
- ((shmem_page_offset | page_length)
- & (cpu_info_primary.ci_cflush_lsize - 1));
- page_do_bit17_swizzling = obj_do_bit17_swizzling &&
- (page_to_phys(page) & (1 << 17)) != 0;
-
- /* Try the fast path. */
- ret = shmem_pwrite_fast(page, shmem_page_offset, page_length,
- user_data, page_do_bit17_swizzling,
- partial_cacheline_write, needs_clflush_after);
- if (ret == 0)
- goto next_page;
-
- /* Fast path failed. Try the slow path. */
- hit_slowpath = 1;
- mutex_unlock(&dev->struct_mutex);
- ret = shmem_pwrite_slow(page, shmem_page_offset, page_length,
- user_data, page_do_bit17_swizzling,
- partial_cacheline_write, needs_clflush_after);
- mutex_lock(&dev->struct_mutex);
- if (ret)
- goto out;
-
-next_page: KASSERT(page_length <= remain);
- remain -= page_length;
- user_data += page_length;
- offset += page_length;
- }
#else
- for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents,
- offset >> PAGE_SHIFT) {
struct page *page = sg_page_iter_page(&sg_iter);
- int partial_cacheline_write;
+#endif
if (remain <= 0)
break;
@@ -1143,9 +1085,8 @@ next_page: KASSERT(page_length <= remain
/* If we don't overwrite a cacheline completely we need to be
* careful to have up-to-date data by first clflushing. Don't
* overcomplicate things and flush the entire patch. */
- partial_cacheline_write = needs_clflush_before &&
- ((shmem_page_offset | page_length)
- & (boot_cpu_data.x86_clflush_size - 1));
+ const int partial_cacheline_write = needs_clflush_before &&
+ ((shmem_page_offset | page_length) & flush_mask);
page_do_bit17_swizzling = obj_do_bit17_swizzling &&
(page_to_phys(page) & (1 << 17)) != 0;
@@ -1174,7 +1115,6 @@ next_page:
user_data += page_length;
offset += page_length;
}
-#endif
out:
i915_gem_object_unpin_pages(obj);
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c:1.1.1.1.4.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c:1.1.1.1.4.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c:1.1.1.1.4.1 Fri Mar 6 21:39:09 2015
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c Tue Mar 17 17:52:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nouveau_subdev_clock_nv50.c,v 1.1.1.1.4.1 2015/03/06 21:39:09 snj Exp $ */
+/* $NetBSD: nouveau_subdev_clock_nv50.c,v 1.1.1.1.4.2 2015/03/17 17:52:49 riz Exp $ */
/*
* Copyright 2012 Red Hat Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_clock_nv50.c,v 1.1.1.1.4.1 2015/03/06 21:39:09 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_clock_nv50.c,v 1.1.1.1.4.2 2015/03/17 17:52:49 riz Exp $");
#include <subdev/bios.h>
#include <subdev/bios/pll.h>
@@ -119,7 +119,7 @@ read_pll_src(struct nv50_clock_priv *pri
BUG_ON(1);
M = 0; /* XXX GCC is stupid */
N = 0; /* XXX GCC is stupid */
- N = P; /* XXX GCC is stupid */
+ P = 0; /* XXX GCC is stupid */
}
if (M)
Index: src/sys/external/bsd/drm2/drm/drm_drv.c
diff -u src/sys/external/bsd/drm2/drm/drm_drv.c:1.9.2.3 src/sys/external/bsd/drm2/drm/drm_drv.c:1.9.2.4
--- src/sys/external/bsd/drm2/drm/drm_drv.c:1.9.2.3 Fri Mar 6 21:39:10 2015
+++ src/sys/external/bsd/drm2/drm/drm_drv.c Tue Mar 17 17:52:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: drm_drv.c,v 1.9.2.3 2015/03/06 21:39:10 snj Exp $ */
+/* $NetBSD: drm_drv.c,v 1.9.2.4 2015/03/17 17:52:49 riz Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: drm_drv.c,v 1.9.2.3 2015/03/06 21:39:10 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: drm_drv.c,v 1.9.2.4 2015/03/17 17:52:49 riz Exp $");
#include <sys/param.h>
#include <sys/types.h>
@@ -469,6 +469,8 @@ drm_dequeue_event(struct drm_file *file,
event = list_first_entry(&file->event_list, struct drm_pending_event,
link);
if (event->event->length > max_length) {
+ /* Event is too large, can't return it. */
+ event = NULL;
ret = 0;
goto out;
}
Index: src/sys/external/bsd/drm2/drm/drm_gem_vm.c
diff -u src/sys/external/bsd/drm2/drm/drm_gem_vm.c:1.5 src/sys/external/bsd/drm2/drm/drm_gem_vm.c:1.5.2.1
--- src/sys/external/bsd/drm2/drm/drm_gem_vm.c:1.5 Sat Jul 26 21:15:45 2014
+++ src/sys/external/bsd/drm2/drm/drm_gem_vm.c Tue Mar 17 17:52:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: drm_gem_vm.c,v 1.5 2014/07/26 21:15:45 riastradh Exp $ */
+/* $NetBSD: drm_gem_vm.c,v 1.5.2.1 2015/03/17 17:52:49 riz Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: drm_gem_vm.c,v 1.5 2014/07/26 21:15:45 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: drm_gem_vm.c,v 1.5.2.1 2015/03/17 17:52:49 riz Exp $");
#include <sys/types.h>
@@ -95,7 +95,7 @@ drm_gem_mmap_object(struct drm_device *d
static int
drm_gem_mmap_object_locked(struct drm_device *dev, off_t byte_offset,
size_t nbytes, int prot __unused, struct uvm_object **uobjp,
- voff_t *uoffsetp, struct file *file __unused)
+ voff_t *uoffsetp, struct file *file)
{
const unsigned long startpage = (byte_offset >> PAGE_SHIFT);
const unsigned long npages = (nbytes >> PAGE_SHIFT);
@@ -118,6 +118,9 @@ drm_gem_mmap_object_locked(struct drm_de
return 0;
}
+ if (!drm_vma_node_is_allowed(node, file))
+ return -EACCES;
+
struct drm_gem_object *const obj = container_of(node,
struct drm_gem_object, vma_node);
KASSERT(obj->dev == dev);
Index: src/sys/external/bsd/drm2/i915drm/intel_gtt.c
diff -u src/sys/external/bsd/drm2/i915drm/intel_gtt.c:1.4 src/sys/external/bsd/drm2/i915drm/intel_gtt.c:1.4.2.1
--- src/sys/external/bsd/drm2/i915drm/intel_gtt.c:1.4 Wed Jul 16 20:56:25 2014
+++ src/sys/external/bsd/drm2/i915drm/intel_gtt.c Tue Mar 17 17:52:48 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: intel_gtt.c,v 1.4 2014/07/16 20:56:25 riastradh Exp $ */
+/* $NetBSD: intel_gtt.c,v 1.4.2.1 2015/03/17 17:52:48 riz Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
/* Intel GTT stubs */
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_gtt.c,v 1.4 2014/07/16 20:56:25 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_gtt.c,v 1.4.2.1 2015/03/17 17:52:48 riz Exp $");
#include <sys/types.h>
#include <sys/bus.h>
@@ -143,19 +143,31 @@ intel_gtt_insert_entries(bus_dmamap_t dm
struct agp_i810_softc *const isc = agp_i810_sc->as_chipc;
off_t va = (va_page << PAGE_SHIFT);
unsigned seg;
+ int gtt_flags = 0;
int error;
KASSERT(0 <= va);
KASSERT((va >> PAGE_SHIFT) == va_page);
KASSERT(0 < dmamap->dm_nsegs);
+ gtt_flags |= AGP_I810_GTT_VALID;
+ switch (flags) {
+ case AGP_USER_MEMORY:
+ break;
+ case AGP_USER_CACHED_MEMORY:
+ gtt_flags |= AGP_I810_GTT_CACHED;
+ break;
+ default:
+ panic("invalid intel gtt flags: %x", flags);
+ }
+
for (seg = 0; seg < dmamap->dm_nsegs; seg++) {
const bus_addr_t addr = dmamap->dm_segs[seg].ds_addr;
KASSERT(dmamap->dm_segs[seg].ds_len == PAGE_SIZE);
/* XXX Respect flags. */
- error = agp_i810_write_gtt_entry(isc, va, (addr | 1));
+ error = agp_i810_write_gtt_entry(isc, va, addr, gtt_flags);
if (error)
device_printf(agp_i810_sc->as_dev,
"write gtt entry"
@@ -171,6 +183,7 @@ intel_gtt_clear_range(unsigned va_page,
{
struct agp_i810_softc *const isc = agp_i810_sc->as_chipc;
const bus_addr_t addr = intel_gtt.scratch_map->dm_segs[0].ds_addr;
+ const int gtt_flags = AGP_I810_GTT_VALID;
off_t va = (va_page << PAGE_SHIFT);
KASSERT(0 <= va);
@@ -178,7 +191,7 @@ intel_gtt_clear_range(unsigned va_page,
KASSERT(0 < npages);
while (npages--) {
- agp_i810_write_gtt_entry(isc, va, (addr | 1));
+ agp_i810_write_gtt_entry(isc, va, addr, gtt_flags);
va += PAGE_SIZE;
}
agp_i810_post_gtt_entry(isc, va - PAGE_SIZE);
Index: src/sys/external/bsd/drm2/include/drm/intel-gtt.h
diff -u src/sys/external/bsd/drm2/include/drm/intel-gtt.h:1.4 src/sys/external/bsd/drm2/include/drm/intel-gtt.h:1.4.2.1
--- src/sys/external/bsd/drm2/include/drm/intel-gtt.h:1.4 Wed Jul 16 20:56:25 2014
+++ src/sys/external/bsd/drm2/include/drm/intel-gtt.h Tue Mar 17 17:52:49 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: intel-gtt.h,v 1.4 2014/07/16 20:56:25 riastradh Exp $ */
+/* $NetBSD: intel-gtt.h,v 1.4.2.1 2015/03/17 17:52:49 riz Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -50,14 +50,8 @@ void intel_gtt_chipset_flush(void);
void intel_gtt_insert_entries(bus_dmamap_t, unsigned, unsigned);
void intel_gtt_clear_range(unsigned, unsigned);
-#define AGP_DCACHE_MEMORY 1
-#define AGP_PHYS_MEMORY 2
-
-/* XXX Dummy stubs -- should make these mean something and respect them. */
-#define AGP_USER_MEMORY 0
-#define AGP_USER_CACHED_MEMORY 0
-
-#define AGP_USER_CACHED_MEMORY_GFDT __BIT(3)
+#define AGP_USER_MEMORY 1
+#define AGP_USER_CACHED_MEMORY 2
extern int intel_iommu_gfx_mapped;
