Module Name:    src
Committed By:   matt
Date:           Sun Mar 22 23:17:57 UTC 2015

Modified Files:
        src/sys/arch/arm/arm32: cpuswitch.S

Log Message:
Make sure to save the user thread point in softint_switch in case it was
set just before we got an interrupt.  Otherwise if the softint blocks, the
old value would be restored and change lost.


To generate a diff of this commit:
cvs rdiff -u -r1.85 -r1.86 src/sys/arch/arm/arm32/cpuswitch.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/cpuswitch.S
diff -u src/sys/arch/arm/arm32/cpuswitch.S:1.85 src/sys/arch/arm/arm32/cpuswitch.S:1.86
--- src/sys/arch/arm/arm32/cpuswitch.S:1.85	Sat Oct 18 08:33:24 2014
+++ src/sys/arch/arm/arm32/cpuswitch.S	Sun Mar 22 23:17:57 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpuswitch.S,v 1.85 2014/10/18 08:33:24 snj Exp $	*/
+/*	$NetBSD: cpuswitch.S,v 1.86 2015/03/22 23:17:57 matt Exp $	*/
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -87,7 +87,7 @@
 #include <arm/asm.h>
 #include <arm/locore.h>
 
-	RCSID("$NetBSD: cpuswitch.S,v 1.85 2014/10/18 08:33:24 snj Exp $")
+	RCSID("$NetBSD: cpuswitch.S,v 1.86 2015/03/22 23:17:57 matt Exp $")
 
 /* LINTSTUB: include <sys/param.h> */
 	
@@ -397,6 +397,15 @@ ENTRY_NP(softint_switch)
 	stmia	r3, {r8-r13}
 #endif
 
+#ifdef _ARM_ARCH_6
+	/*
+	 * Save user read/write thread/process id register in cause it was
+	 * set in userland.
+	 */
+	mrc	p15, 0, r0, c13, c0, 2
+	str	r0, [r5, #(PCB_USER_PID_RW)]
+#endif
+
 	/* this is an invariant so load before disabling intrs */
 	ldr	r2, [r5, #(L_PCB)]	/* get new lwp's pcb */
 

Reply via email to