Module Name: src
Committed By: jmcneill
Date: Thu Apr 16 21:50:35 UTC 2015
Modified Files:
src/sys/arch/arm/omap: if_cpsw.c if_cpswreg.h
Log Message:
Disable flow control with CPSW_SS FLOW_CONTROL register (cherry-picked
from FreeBSD driver). Resolves device timeout / watchdog issues for me.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/omap/if_cpsw.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/omap/if_cpswreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/omap/if_cpsw.c
diff -u src/sys/arch/arm/omap/if_cpsw.c:1.11 src/sys/arch/arm/omap/if_cpsw.c:1.12
--- src/sys/arch/arm/omap/if_cpsw.c:1.11 Thu Mar 26 22:00:45 2015
+++ src/sys/arch/arm/omap/if_cpsw.c Thu Apr 16 21:50:35 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: if_cpsw.c,v 1.11 2015/03/26 22:00:45 skrll Exp $ */
+/* $NetBSD: if_cpsw.c,v 1.12 2015/04/16 21:50:35 jmcneill Exp $ */
/*
* Copyright (c) 2013 Jonathan A. Kollasch
@@ -53,7 +53,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: if_cpsw.c,v 1.11 2015/03/26 22:00:45 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: if_cpsw.c,v 1.12 2015/04/16 21:50:35 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -954,6 +954,9 @@ cpsw_init(struct ifnet *ifp)
}
sc->sc_rxhead = 0;
+ /* turn off flow control */
+ cpsw_write_4(sc, CPSW_SS_FLOW_CONTROL, 0);
+
/* align layer 3 header to 32-bit */
cpsw_write_4(sc, CPSW_CPDMA_RX_BUFFER_OFFSET, ETHER_ALIGN);
Index: src/sys/arch/arm/omap/if_cpswreg.h
diff -u src/sys/arch/arm/omap/if_cpswreg.h:1.4 src/sys/arch/arm/omap/if_cpswreg.h:1.5
--- src/sys/arch/arm/omap/if_cpswreg.h:1.4 Fri Mar 13 08:56:35 2015
+++ src/sys/arch/arm/omap/if_cpswreg.h Thu Apr 16 21:50:35 2015
@@ -37,6 +37,7 @@
#define CPSW_SS_SOFT_RESET (CPSW_SS_OFFSET + 0x08)
#define CPSW_SS_STAT_PORT_EN (CPSW_SS_OFFSET + 0x0C)
#define CPSW_SS_PTYPE (CPSW_SS_OFFSET + 0x10)
+#define CPSW_SS_FLOW_CONTROL (CPSW_SS_OFFSET + 0x24)
#define CPSW_SS_RGMII_CTL (CPSW_SS_OFFSET + 0x88)
#define CPSW_PORT_OFFSET 0x0100
