Module Name: src
Committed By: martin
Date: Fri Apr 17 12:51:05 UTC 2015
Modified Files:
src/lib/libc/arch/ia64/gen: Makefile.inc
Added Files:
src/lib/libc/arch/ia64/gen: _lwp.c _setjmp.S setjmp.S sigsetjmp.S
Log Message:
Add set/longjmp and friends (nearly verbatim from FreeBSD).
Add a dummy _lwp_makecontext() function (enough to make autoconfigury
happy and gcc mknative work)
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/lib/libc/arch/ia64/gen/Makefile.inc
cvs rdiff -u -r0 -r1.1 src/lib/libc/arch/ia64/gen/_lwp.c \
src/lib/libc/arch/ia64/gen/_setjmp.S src/lib/libc/arch/ia64/gen/setjmp.S \
src/lib/libc/arch/ia64/gen/sigsetjmp.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/lib/libc/arch/ia64/gen/Makefile.inc
diff -u src/lib/libc/arch/ia64/gen/Makefile.inc:1.5 src/lib/libc/arch/ia64/gen/Makefile.inc:1.6
--- src/lib/libc/arch/ia64/gen/Makefile.inc:1.5 Thu Dec 27 10:41:18 2012
+++ src/lib/libc/arch/ia64/gen/Makefile.inc Fri Apr 17 12:51:05 2015
@@ -1,8 +1,9 @@
-# $NetBSD: Makefile.inc,v 1.5 2012/12/27 10:41:18 martin Exp $
+# $NetBSD: Makefile.inc,v 1.6 2015/04/17 12:51:05 martin Exp $
+SRCS+= _lwp.c
SRCS+= bswap16.c bswap32.c bswap64.c
-
-SRCS+= flt_rounds.c fpgetround.c fpsetround.c fpgetmask.c fpsetmask.c
+SRCS+= setjmp.S _setjmp.S sigsetjmp.S
+SRCS+= flt_rounds.c fpgetround.c fpsetround.c fpgetmask.c fpsetmask.c
SRCS+= isinff_ieee754.c isinfd_ieee754.c
SRCS+= isnanf_ieee754.c isnand_ieee754.c
SRCS+= fpclassifyf_ieee754.c fpclassifyd_ieee754.c
Added files:
Index: src/lib/libc/arch/ia64/gen/_lwp.c
diff -u /dev/null src/lib/libc/arch/ia64/gen/_lwp.c:1.1
--- /dev/null Fri Apr 17 12:51:05 2015
+++ src/lib/libc/arch/ia64/gen/_lwp.c Fri Apr 17 12:51:05 2015
@@ -0,0 +1,68 @@
+/* $NetBSD: _lwp.c,v 1.1 2015/04/17 12:51:05 martin Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nathan J. Williams.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#if defined(LIBC_SCCS) && !defined(lint)
+__RCSID("$NetBSD: _lwp.c,v 1.1 2015/04/17 12:51:05 martin Exp $");
+#endif /* LIBC_SCCS and not lint */
+
+#include "namespace.h"
+#include <sys/types.h>
+#include <ucontext.h>
+#include <lwp.h>
+#include <stdlib.h>
+
+void
+_lwp_makecontext(ucontext_t *u, void (*start)(void *),
+ void *arg, void *private, caddr_t stack_base, size_t stack_size)
+{
+#if 0
+ __greg_t *gr;
+
+ getcontext(u);
+ gr = u->uc_mcontext.__gregs;
+
+ u->uc_link = NULL;
+
+ u->uc_stack.ss_sp = stack_base;
+ u->uc_stack.ss_size = stack_size;
+
+ gr[_REG_PC] = (unsigned long)start;
+ gr[_REG_T12] = (unsigned long) start;
+ gr[_REG_RA] = (unsigned long) _lwp_exit;
+ gr[_REG_A0] = (unsigned long) arg;
+ gr[_REG_SP] = ((unsigned long) (stack_base + stack_size)) & ~0x7;
+ gr[_REG_S6] = 0;
+ gr[_REG_UNIQUE] = (unsigned long)private;
+
+ u->uc_flags |= _UC_TLSBASE;
+#endif
+}
Index: src/lib/libc/arch/ia64/gen/_setjmp.S
diff -u /dev/null src/lib/libc/arch/ia64/gen/_setjmp.S:1.1
--- /dev/null Fri Apr 17 12:51:05 2015
+++ src/lib/libc/arch/ia64/gen/_setjmp.S Fri Apr 17 12:51:05 2015
@@ -0,0 +1,308 @@
+//
+// Copyright (c) 1999, 2000
+// Intel Corporation.
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions
+// are met:
+//
+// 1. Redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// 3. All advertising materials mentioning features or use of this software
+// must display the following acknowledgement:
+//
+// This product includes software developed by Intel Corporation and
+// its contributors.
+//
+// 4. Neither the name of Intel Corporation or its contributors may be
+// used to endorse or promote products derived from this software
+// without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS''
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+// THE POSSIBILITY OF SUCH DAMAGE.
+//
+//
+
+//
+// Module Name:
+//
+// setjmp.s
+//
+// Abstract:
+//
+// Contains an implementation of setjmp and longjmp for the
+// IA-64 architecture.
+
+ .file "setjmp.s"
+
+#include <machine/asm.h>
+RCSID("$NetBSD: _setjmp.S,v 1.1 2015/04/17 12:51:05 martin Exp $");
+
+#include <machine/setjmp.h>
+
+// int _setjmp(struct jmp_buffer *)
+//
+// Setup a non-local goto.
+//
+// Description:
+//
+// SetJump stores the current register set in the area pointed to
+// by "save". It returns zero. Subsequent calls to "LongJump" will
+// restore the registers and return non-zero to the same location.
+//
+// On entry, r32 contains the pointer to the jmp_buffer
+//
+
+ENTRY(_setjmp, 1)
+ add r10 = J_PREDS, r32 // skip Unats & pfs save area
+ add r11 = J_BSP, r32
+ //
+ // save immediate context
+ //
+ mov r2 = ar.bsp // save backing store pointer
+ mov r3 = pr // save predicates
+ flushrs
+ ;;
+ //
+ // save user Unat register
+ //
+ mov r16 = ar.lc // save loop count register
+ mov r14 = ar.unat // save user Unat register
+
+ st8 [r10] = r3, J_LC-J_PREDS
+ st8 [r11] = r2, J_R4-J_BSP
+ ;;
+ st8 [r10] = r16, J_R5-J_LC
+ st8 [r32] = r14, J_NATS // Note: Unat at the
+ // beginning of the save area
+ mov r15 = ar.pfs
+ ;;
+ //
+ // save preserved general registers & NaT's
+ //
+ .mem.offset 0,0
+ st8.spill [r11] = r4, J_R6-J_R4
+ .mem.offset 8,0
+ st8.spill [r10] = r5, J_R7-J_R5
+ ;;
+ .mem.offset 16,0
+ st8.spill [r11] = r6, J_SP-J_R6
+ .mem.offset 24,0
+ st8.spill [r10] = r7, J_F3-J_R7
+ ;;
+ st8.spill [r11] = sp, J_F2-J_SP
+ mov r16 = ar.rsc
+ ;;
+ //
+ // save spilled Unat and pfs registers
+ //
+ mov r2 = ar.unat // save Unat register after spill
+ mov ar.rsc = r0
+ ;;
+ st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs
+ mov r17 = ar.rnat
+ ;;
+ st8 [r32] = r15, J_RNAT-J_PFS // save pfs
+ mov ar.rsc = r16
+ //
+ // save floating registers
+ //
+ stf.spill [r11] = f2, J_F4-J_F2
+ stf.spill [r10] = f3, J_F5-J_F3
+ ;;
+ stf.spill [r11] = f4, J_F16-J_F4
+ stf.spill [r10] = f5, J_F17-J_F5
+ ;;
+ stf.spill [r11] = f16, J_F18-J_F16
+ stf.spill [r10] = f17, J_F19-J_F17
+ ;;
+ stf.spill [r11] = f18, J_F20-J_F18
+ stf.spill [r10] = f19, J_F21-J_F19
+ ;;
+ stf.spill [r11] = f20, J_F22-J_F20
+ stf.spill [r10] = f21, J_F23-J_F21
+ ;;
+ stf.spill [r11] = f22, J_F24-J_F22
+ stf.spill [r10] = f23, J_F25-J_F23
+ ;;
+ stf.spill [r11] = f24, J_F26-J_F24
+ stf.spill [r10] = f25, J_F27-J_F25
+ ;;
+ stf.spill [r11] = f26, J_F28-J_F26
+ stf.spill [r10] = f27, J_F29-J_F27
+ ;;
+ stf.spill [r11] = f28, J_F30-J_F28
+ stf.spill [r10] = f29, J_F31-J_F29
+ ;;
+ stf.spill [r11] = f30, J_FPSR-J_F30
+ stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr
+ ;;
+ st8 [r32] = r17
+ //
+ // save FPSR register & branch registers
+ //
+ mov r2 = ar.fpsr // save fpsr register
+ mov r3 = b0
+ ;;
+ st8 [r11] = r2, J_B1-J_FPSR
+ st8 [r10] = r3, J_B2-J_B0
+ mov r2 = b1
+ mov r3 = b2
+ ;;
+ st8 [r11] = r2, J_B3-J_B1
+ st8 [r10] = r3, J_B4-J_B2
+ mov r2 = b3
+ mov r3 = b4
+ ;;
+ st8 [r11] = r2, J_B5-J_B3
+ st8 [r10] = r3
+ mov r2 = b5
+ ;;
+ st8 [r11] = r2
+ ;;
+ //
+ // return
+ //
+ mov r8 = r0 // return 0 from setjmp
+ mov ar.unat = r14 // restore unat
+ br.ret.sptk b0
+
+END(_setjmp)
+
+
+//
+// void _longjmp(struct jmp_buffer *, int val)
+//
+// Perform a non-local goto.
+//
+// Description:
+//
+// LongJump initializes the register set to the values saved by a
+// previous 'SetJump' and jumps to the return location saved by that
+// 'SetJump'. This has the effect of unwinding the stack and returning
+// for a second time to the 'SetJump'.
+//
+
+ENTRY(_longjmp, 2)
+ mov r14 = ar.rsc // get user RSC conf
+ mov r8 = r33 // return value
+ add r10 = J_PFS, r32 // get address of pfs
+ ;;
+ mov ar.rsc = r0
+ add r11 = J_NATS, r32
+ add r17 = J_RNAT, r32
+ ;;
+ ld8 r15 = [r10], J_BSP-J_PFS // get pfs
+ ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs
+ mov r31 = r32
+ ;;
+ loadrs
+ mov ar.unat = r2
+ cmp.eq p6,p0=0,r8 // Return value 0?
+ ;;
+ ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer
+ ld8 r17 = [r17] // ar.rnat
+ mov ar.pfs = r15
+ ;;
+ mov ar.bspstore = r16
+(p6) add r8 = 1, r0
+ ;;
+ mov ar.rnat = r17
+ mov ar.rsc = r14 // restore RSC conf
+
+ ld8 r3 = [r11], J_R4-J_LC // get lc register
+ ld8 r2 = [r10], J_R5-J_PREDS // get predicates
+ ;;
+ mov pr = r2, -1
+ mov ar.lc = r3
+ //
+ // restore preserved general registers & NaT's
+ //
+ ld8.fill r4 = [r11], J_R6-J_R4
+ ;;
+ ld8.fill r5 = [r10], J_R7-J_R5
+ ld8.fill r6 = [r11], J_SP-J_R6
+ ;;
+ ld8.fill r7 = [r10], J_F2-J_R7
+ ld8.fill sp = [r11], J_F3-J_SP
+ ;;
+ //
+ // restore floating registers
+ //
+ ldf.fill f2 = [r10], J_F4-J_F2
+ ldf.fill f3 = [r11], J_F5-J_F3
+ ;;
+ ldf.fill f4 = [r10], J_F16-J_F4
+ ldf.fill f5 = [r11], J_F17-J_F5
+ ;;
+ ldf.fill f16 = [r10], J_F18-J_F16
+ ldf.fill f17 = [r11], J_F19-J_F17
+ ;;
+ ldf.fill f18 = [r10], J_F20-J_F18
+ ldf.fill f19 = [r11], J_F21-J_F19
+ ;;
+ ldf.fill f20 = [r10], J_F22-J_F20
+ ldf.fill f21 = [r11], J_F23-J_F21
+ ;;
+ ldf.fill f22 = [r10], J_F24-J_F22
+ ldf.fill f23 = [r11], J_F25-J_F23
+ ;;
+ ldf.fill f24 = [r10], J_F26-J_F24
+ ldf.fill f25 = [r11], J_F27-J_F25
+ ;;
+ ldf.fill f26 = [r10], J_F28-J_F26
+ ldf.fill f27 = [r11], J_F29-J_F27
+ ;;
+ ldf.fill f28 = [r10], J_F30-J_F28
+ ldf.fill f29 = [r11], J_F31-J_F29
+ ;;
+ ldf.fill f30 = [r10], J_FPSR-J_F30
+ ldf.fill f31 = [r11], J_B0-J_F31 ;;
+
+ //
+ // restore branch registers and fpsr
+ //
+ ld8 r16 = [r10], J_B1-J_FPSR // get fpsr
+ ld8 r17 = [r11], J_B2-J_B0 // get return pointer
+ ;;
+ mov ar.fpsr = r16
+ mov b0 = r17
+ ld8 r2 = [r10], J_B3-J_B1
+ ld8 r3 = [r11], J_B4-J_B2
+ ;;
+ mov b1 = r2
+ mov b2 = r3
+ ld8 r2 = [r10], J_B5-J_B3
+ ld8 r3 = [r11]
+ ;;
+ mov b3 = r2
+ mov b4 = r3
+ ld8 r2 = [r10]
+ ld8 r21 = [r31] // get user unat
+ ;;
+ mov b5 = r2
+ mov ar.unat = r21
+
+ //
+ // invalidate ALAT
+ //
+ invala ;;
+
+ br.ret.sptk b0
+
+END(_longjmp)
Index: src/lib/libc/arch/ia64/gen/setjmp.S
diff -u /dev/null src/lib/libc/arch/ia64/gen/setjmp.S:1.1
--- /dev/null Fri Apr 17 12:51:05 2015
+++ src/lib/libc/arch/ia64/gen/setjmp.S Fri Apr 17 12:51:05 2015
@@ -0,0 +1,82 @@
+/* $NetBSD: setjmp.S,v 1.1 2015/04/17 12:51:05 martin Exp $ */
+
+/*
+ * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [email protected]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#define _LOCORE
+#include <machine/asm.h>
+
+RCSID("$NetBSD: setjmp.S,v 1.1 2015/04/17 12:51:05 martin Exp $")
+
+#include <machine/setjmp.h>
+
+/*
+ * C library -- setjmp, longjmp
+ *
+ * longjmp(a,v)
+ * will generate a "return(v)" from
+ * the last call to
+ * setjmp(a)
+ * by restoring registers from the stack,
+ * and the previous signal state.
+ */
+
+ENTRY(__setjmp14, 1)
+ alloc loc0=ar.pfs,1,2,3,0
+ mov loc1=rp
+ ;;
+ mov out0=1 // how = SIG_BLOCK
+ mov out1=0 // set = NULL
+ add out2=J_SIGSET,in0 // oset = &jb[J_SIGSET]
+ br.call.sptk.few rp=_sys___sigprocmask14
+ ;;
+ mov rp=loc1
+ mov r14=loc0
+ ;;
+ alloc r15=ar.pfs,1,0,0,0 // drop register frame
+ ;;
+ mov ar.pfs=r14 // restore ar.pfs
+ br.sptk.many _setjmp // finish saving state
+END(__setjmp14)
+
+ENTRY(__longjmp14, 2)
+ alloc loc0=ar.pfs,2,2,3,0
+ mov loc1=rp
+ ;;
+ mov out0=3 // how = SIG_SETMASK
+ add out1=J_SIGSET,in0 // set = &jb[J_SIGSET]
+ mov out2=0 // oset = NULL
+ br.call.sptk.few rp=_sys___sigprocmask14
+ ;;
+ mov rp=loc1
+ mov r14=loc0
+ ;;
+ alloc r15=ar.pfs,2,0,0,0 // drop register frame
+ ;;
+ mov ar.pfs=r14 // restore ar.pfs
+ br.sptk.many _longjmp // finish restoring state
+END(__longjmp14)
Index: src/lib/libc/arch/ia64/gen/sigsetjmp.S
diff -u /dev/null src/lib/libc/arch/ia64/gen/sigsetjmp.S:1.1
--- /dev/null Fri Apr 17 12:51:05 2015
+++ src/lib/libc/arch/ia64/gen/sigsetjmp.S Fri Apr 17 12:51:05 2015
@@ -0,0 +1,64 @@
+/* $NetBSD: sigsetjmp.S,v 1.1 2015/04/17 12:51:05 martin Exp $ */
+
+/*
+ * Copyright (c) 1994, 1995 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [email protected]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <machine/asm.h>
+RCSID("$NetBSD: sigsetjmp.S,v 1.1 2015/04/17 12:51:05 martin Exp $");
+
+#include <machine/setjmp.h>
+
+/*
+ * C library -- sigsetjmp, siglongjmp
+ *
+ * siglongjmp(a,v)
+ * will generate a "return(v)" from
+ * the last call to
+ * sigsetjmp(a, mask)
+ * by restoring registers from the stack.
+ * If `mask' is non-zero, the previous signal
+ * state will be restored.
+ */
+
+ENTRY(__sigsetjmp14, 2)
+ add r14=J_SIGMASK,in0 // place to save mask
+ cmp.ne p6,p7=0,in1 // save signal state?
+ ;;
+ st8 [r14]=in1 // save mask value
+(p6) br.cond.dptk.many __setjmp14
+(p7) br.cond.dpnt.many _setjmp
+END(__sigsetjmp14)
+
+ENTRY(__siglongjmp14, 2)
+ add r14=J_SIGMASK,in0 // address of mask value
+ ;;
+ ld8 r14=[r14]
+ ;;
+ cmp.ne p6,p7=0,r14 // did we save signals?
+(p6) br.cond.dptk.many __longjmp14
+(p7) br.cond.dpnt.many _longjmp
+END(__siglongjmp14)
