Module Name: src
Committed By: jmcneill
Date: Sun May 3 22:40:02 UTC 2015
Modified Files:
src/sys/arch/arm/nvidia: tegra_sdhc.c
Log Message:
since we dont support SDR104 yet, dont try to optimize it; instead, optimize
for HS mode, which brings us up from 34 MHz to 45.333 MHz
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/nvidia/tegra_sdhc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/nvidia/tegra_sdhc.c
diff -u src/sys/arch/arm/nvidia/tegra_sdhc.c:1.4 src/sys/arch/arm/nvidia/tegra_sdhc.c:1.5
--- src/sys/arch/arm/nvidia/tegra_sdhc.c:1.4 Sun May 3 11:46:44 2015
+++ src/sys/arch/arm/nvidia/tegra_sdhc.c Sun May 3 22:40:02 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_sdhc.c,v 1.4 2015/05/03 11:46:44 jmcneill Exp $ */
+/* $NetBSD: tegra_sdhc.c,v 1.5 2015/05/03 22:40:02 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.4 2015/05/03 11:46:44 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.5 2015/05/03 22:40:02 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -123,12 +123,12 @@ tegra_sdhc_attach(device_t parent, devic
if (sc->sc_pin_wp)
sc->sc.sc_vendor_write_protect = tegra_sdhc_write_protect;
- /*
- * The controller supports SDR104 speeds (208 MHz). With PLLP (408 Mhz)
- * as input and div=2 we can get a reasonable 204 MHz for the SDHC.
- */
- const u_int div = howmany(tegra_car_pllp0_rate() / 1000, 208000);
+#if notyet
+ tegra_car_periph_sdmmc_set_div(sc->sc_port, 1);
+#else
+ const u_int div = howmany(tegra_car_pllp0_rate() / 1000, 50000);
tegra_car_periph_sdmmc_set_div(sc->sc_port, div);
+#endif
sc->sc.sc_clkbase = tegra_car_periph_sdmmc_rate(sc->sc_port) / 1000;
aprint_naive("\n");
