Module Name:    src
Committed By:   msaitoh
Date:           Wed Jul  1 15:46:26 UTC 2015

Modified Files:
        src/usr.sbin/cpuctl/arch: i386.c

Log Message:
 Add Xeon E5-4600 v3,  Xeon E3-1200 v4 etc. from the latest Intel SDM.


To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/usr.sbin/cpuctl/arch/i386.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/usr.sbin/cpuctl/arch/i386.c
diff -u src/usr.sbin/cpuctl/arch/i386.c:1.66 src/usr.sbin/cpuctl/arch/i386.c:1.67
--- src/usr.sbin/cpuctl/arch/i386.c:1.66	Fri May  8 07:29:08 2015
+++ src/usr.sbin/cpuctl/arch/i386.c	Wed Jul  1 15:46:26 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: i386.c,v 1.66 2015/05/08 07:29:08 msaitoh Exp $	*/
+/*	$NetBSD: i386.c,v 1.67 2015/07/01 15:46:26 msaitoh Exp $	*/
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
 
 #include <sys/cdefs.h>
 #ifndef lint
-__RCSID("$NetBSD: i386.c,v 1.66 2015/05/08 07:29:08 msaitoh Exp $");
+__RCSID("$NetBSD: i386.c,v 1.67 2015/07/01 15:46:26 msaitoh Exp $");
 #endif /* not lint */
 
 #include <sys/types.h>
@@ -354,26 +354,26 @@ const struct cpu_cpuid_nameclass i386_cp
 					 "Ivy Bridge",
 				[0x3c] = "4th gen Core, Xeon E3-12xx v3 "
 					 "(Haswell)",
-				[0x3d] = "Core M-5xxx, Future 5th gen Core (Broadwell)",
+				[0x3d] = "Core M-5xxx, 5th gen Core (Broadwell)",
 				[0x3e] = "Xeon E5/E7 v2 (Ivy Bridge-E), "
 					 "Core i7-49xx Extreme",
-				[0x3f] = "Xeon E5-2600/1600 v3 (Haswell-E), "
+				[0x3f] = "Xeon E5-4600/2600/1600 v3, Xeon E7 v3 (Haswell-E), "
 					 "Core i7-59xx Extreme",
 				[0x45] = "4th gen Core, Xeon E3-12xx v3 "
 					 "(Haswell)",
 				[0x46] = "4th gen Core, Xeon E3-12xx v3 "
 					 "(Haswell)",
-				[0x47] = "5th gen Core (Broadwell)",
+				[0x47] = "5th gen Core, Xeon E3-1200 v4 (Broadwell)",
 				[0x4a] = "Atom Z3400",
 				[0x4c] = "Atom X[57]-Z8000 (Airmont)",
 				[0x4d] = "Atom C2000",
-				[0x4e] = "Next gen Core (Sky Lake)",
+				[0x4e] = "Next gen Core (Skylake)",
 				[0x4f] = "Future gen Xeon (Broadwell)",
 				[0x56] = "Next gen Xeon D (Broadwell)",
 				[0x57] = "Next gen Xeon Phi",
 				[0x5a] = "Atom E3500",
 				[0x5d] = "Atom X3-C3000 (Silvermont)",
-				[0x5e] = "Next gen Core (Sky Lake)",
+				[0x5e] = "Next gen Core (Skylake)",
 			},
 			"Pentium Pro, II or III",	/* Default */
 			NULL,

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