Module Name: src
Committed By: matt
Date: Wed Jul 29 04:59:48 UTC 2015
Modified Files:
src/sys/arch/arm/cortex: gic.c
Log Message:
Adjust some of IPLs of various IPIs.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/cortex/gic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.19 src/sys/arch/arm/cortex/gic.c:1.20
--- src/sys/arch/arm/cortex/gic.c:1.19 Wed Apr 15 15:45:06 2015
+++ src/sys/arch/arm/cortex/gic.c Wed Jul 29 04:59:48 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.19 2015/04/15 15:45:06 matt Exp $ */
+/* $NetBSD: gic.c,v 1.20 2015/07/29 04:59:48 matt Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -34,7 +34,7 @@
#define _INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.19 2015/04/15 15:45:06 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.20 2015/07/29 04:59:48 matt Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -612,13 +612,13 @@ armgic_attach(device_t parent, device_t
#ifdef MULTIPROCESSOR
intr_establish(ARMGIC_SGI_IPIBASE + IPI_AST, IPL_VM,
IST_MPSAFE | IST_EDGE, pic_ipi_ast, (void *)-1);
- intr_establish(ARMGIC_SGI_IPIBASE + IPI_XCALL, IPL_VM,
+ intr_establish(ARMGIC_SGI_IPIBASE + IPI_XCALL, IPL_HIGH,
IST_MPSAFE | IST_EDGE, pic_ipi_xcall, (void *)-1);
- intr_establish(ARMGIC_SGI_IPIBASE + IPI_GENERIC, IPL_VM,
+ intr_establish(ARMGIC_SGI_IPIBASE + IPI_GENERIC, IPL_HIGH,
IST_MPSAFE | IST_EDGE, pic_ipi_generic, (void *)-1);
intr_establish(ARMGIC_SGI_IPIBASE + IPI_NOP, IPL_VM,
IST_MPSAFE | IST_EDGE, pic_ipi_nop, (void *)-1);
- intr_establish(ARMGIC_SGI_IPIBASE + IPI_SHOOTDOWN, IPL_VM,
+ intr_establish(ARMGIC_SGI_IPIBASE + IPI_SHOOTDOWN, IPL_SCHED,
IST_MPSAFE | IST_EDGE, pic_ipi_shootdown, (void *)-1);
#ifdef DDB
intr_establish(ARMGIC_SGI_IPIBASE + IPI_DDB, IPL_HIGH,
