Module Name: src
Committed By: ryo
Date: Thu Jul 30 08:09:37 UTC 2015
Modified Files:
src/sys/arch/arm/imx: imx6_iomuxreg.h imx6var.h
src/sys/arch/evbarm/conf: CUBOX-I NITROGEN6X files.nitrogen6
std.nitrogen6
src/sys/arch/evbarm/nitrogen6: nitrogen6_machdep.c
Added Files:
src/sys/arch/evbarm/nitrogen6: nitrogen6_iomux.c
Log Message:
- setup iomux before attach console
- define EVBARM_BOARDTYPE in each config file
- add iomux settings for UART1
- add some iomux definitions
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx6_iomuxreg.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx6var.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbarm/conf/CUBOX-I \
src/sys/arch/evbarm/conf/std.nitrogen6
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/evbarm/conf/NITROGEN6X
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbarm/conf/files.nitrogen6
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbarm/nitrogen6/nitrogen6_iomux.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/imx/imx6_iomuxreg.h
diff -u src/sys/arch/arm/imx/imx6_iomuxreg.h:1.1 src/sys/arch/arm/imx/imx6_iomuxreg.h:1.2
--- src/sys/arch/arm/imx/imx6_iomuxreg.h:1.1 Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_iomuxreg.h Thu Jul 30 08:09:36 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_iomuxreg.h,v 1.1 2014/09/25 05:05:28 ryo Exp $ */
+/* $NetBSD: imx6_iomuxreg.h,v 1.2 2015/07/30 08:09:36 ryo Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -65,10 +65,30 @@
#define IOMUX_GPR6 0x00000018
#define IOMUX_GPR7 0x0000001c
#define IOMUX_GPR8 0x00000020
+#define IOMUX_GPR8_PCS_TX_SWING_LOW __BITS(31, 25)
+#define IOMUX_GPR8_PCS_TX_SWING_FULL __BITS(24, 18)
+#define IOMUX_GPR8_PCS_TX_DEEMPH_GEN2_6DB __BITS(17, 12)
+#define IOMUX_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB __BITS(11, 6)
+#define IOMUX_GPR8_PCS_TX_DEEMPH_GEN1 __BITS(5, 0)
#define IOMUX_GPR9 0x00000024
#define IOMUX_GPR10 0x00000028
#define IOMUX_GPR11 0x0000002c
#define IOMUX_GPR12 0x00000030
+#define IOMUX_GPR12_ARMP_IPG_CLK_EN __BIT(27)
+#define IOMUX_GPR12_ARMP_AHB_CLK_EN __BIT(26)
+#define IOMUX_GPR12_ARMP_ATB_CLK_EN __BIT(25)
+#define IOMUX_GPR12_ARMP_APB_CLK_EN __BIT(24)
+#define IOMUX_GPR12_PCIE_CTL_7 __BITS(23, 21)
+#define IOMUX_GPR12_DIA_STATUS_BUS_SELECT __BITS(20, 17)
+#define IOMUX_GPR12_APPS_PM_XMT_TURNOFF __BIT(16)
+#define IOMUX_GPR12_DEVICE_TYPE __BITS(15, 12)
+#define IOMUX_GPR12_DEVICE_TYPE_PCIE_EP (0 << 12)
+#define IOMUX_GPR12_DEVICE_TYPE_PCIE_RC (2 << 12)
+#define IOMUX_GPR12_APP_INIT_RST __BIT(11)
+#define IOMUX_GPR12_APP_LTSSM_ENABLE __BIT(10)
+#define IOMUX_GPR12_APPS_PM_XMT_PME __BIT(9)
+#define IOMUX_GPR12_LOS_LEVEL __BITS(8, 4)
+#define IOMUX_GPR12_USDHC_DBG_MUX __BITS(3, 2)
#define IOMUX_GPR13 0x00000034
#define IOMUX_GPR13_SDMA_STOP_REQ __BIT(30)
#define IOMUX_GPR13_CAN2_STOP_REQ __BIT(29)
@@ -686,15 +706,32 @@
#define PAD_CTL_PKE __BIT(12)
#define PAD_CTL_PULL (PAD_CTL_PKE|PAD_CTL_PUE)
#define PAD_CTL_KEEPER (PAD_CTL_PKE|0)
+#define PAD_CTL_ODE __BIT(11)
+#define PAD_CTL_ODT __BITS(10, 8)
+#define PAD_CTL_SPEED_MASK __BITS(7, 6)
+#define PAD_CTL_SPEED_RESERVED0 __SHIFTIN(0, PAD_CTL_SPEED_MASK)
+#define PAD_CTL_SPEED_50MHZ __SHIFTIN(1, PAD_CTL_SPEED_MASK)
+#define PAD_CTL_SPEED_100MHZ __SHIFTIN(2, PAD_CTL_SPEED_MASK)
+#define PAD_CTL_SPEED_200MHZ __SHIFTIN(3, PAD_CTL_SPEED_MASK)
#define PAD_CTL_DSE_MASK __BITS(5, 3)
#define PAD_CTL_DSE_HIZ __SHIFTIN(0x0, PAD_CTL_DSE_MASK)
#define PAD_CTL_DSE_290OHM __SHIFTIN(0x1, PAD_CTL_DSE_MASK)
+#define PAD_CTL_DSE_240OHM __SHIFTIN(0x1, PAD_CTL_DSE_MASK)
#define PAD_CTL_DSE_121OHM __SHIFTIN(0x2, PAD_CTL_DSE_MASK)
+#define PAD_CTL_DSE_120OHM __SHIFTIN(0x2, PAD_CTL_DSE_MASK)
+#define PAD_CTL_DSE_80OHM __SHIFTIN(0x3, PAD_CTL_DSE_MASK)
#define PAD_CTL_DSE_76OHM __SHIFTIN(0x3, PAD_CTL_DSE_MASK)
+#define PAD_CTL_DSE_60OHM __SHIFTIN(0x4, PAD_CTL_DSE_MASK)
+#define PAD_CTL_DSE_48OHM __SHIFTIN(0x5, PAD_CTL_DSE_MASK)
#define PAD_CTL_DSE_47OHM __SHIFTIN(0x4, PAD_CTL_DSE_MASK)
#define PAD_CTL_DSE_45OHM __SHIFTIN(0x5, PAD_CTL_DSE_MASK)
+#define PAD_CTL_DSE_40OHM __SHIFTIN(0x6, PAD_CTL_DSE_MASK)
#define PAD_CTL_DSE_37OHM __SHIFTIN(0x6, PAD_CTL_DSE_MASK)
+#define PAD_CTL_DSE_34OHM __SHIFTIN(0x7, PAD_CTL_DSE_MASK)
#define PAD_CTL_DSE_31OHM __SHIFTIN(0x7, PAD_CTL_DSE_MASK)
+#define PAD_CTL_SRE __BIT(0)
+#define PAD_CTL_SRE_SLOW 0
+#define PAD_CTL_SRE_FAST PAD_CTL_SRE
/* IOMUXC_SW_PAD_CTL_PAD_xxx */
#define INPUT_DAISY_0 0
#define INPUT_DAISY_1 1
Index: src/sys/arch/arm/imx/imx6var.h
diff -u src/sys/arch/arm/imx/imx6var.h:1.2 src/sys/arch/arm/imx/imx6var.h:1.3
--- src/sys/arch/arm/imx/imx6var.h:1.2 Tue Oct 7 09:32:47 2014
+++ src/sys/arch/arm/imx/imx6var.h Thu Jul 30 08:09:36 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6var.h,v 1.2 2014/10/07 09:32:47 ryo Exp $ */
+/* $NetBSD: imx6var.h,v 1.3 2015/07/30 08:09:36 ryo Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -48,10 +48,10 @@ extern bus_space_handle_t imx6_armcore_b
/* iomux utility functions in imx6_iomux.c */
struct iomux_conf {
- u_int pin;
-#define IOMUX_CONF_EOT ((u_int)(-1))
- u_short mux;
- u_short pad;
+ uint32_t pin; /* ((MUXADDR<<16)|PADADDR) */
+#define IOMUX_CONF_EOT ((uint32_t)(-1))
+ uint32_t mux:8,
+ pad:24;
};
uint32_t iomux_read(uint32_t);
Index: src/sys/arch/evbarm/conf/CUBOX-I
diff -u src/sys/arch/evbarm/conf/CUBOX-I:1.2 src/sys/arch/evbarm/conf/CUBOX-I:1.3
--- src/sys/arch/evbarm/conf/CUBOX-I:1.2 Sat Oct 11 11:55:07 2014
+++ src/sys/arch/evbarm/conf/CUBOX-I Thu Jul 30 08:09:36 2015
@@ -1,4 +1,4 @@
-# $NetBSD: CUBOX-I,v 1.2 2014/10/11 11:55:07 uebayasi Exp $
+# $NetBSD: CUBOX-I,v 1.3 2015/07/30 08:09:36 ryo Exp $
#
# CuBox-i
# - http://www.solid-run.com/products/cubox-i-mini-computer/
@@ -12,6 +12,9 @@ include "arch/evbarm/conf/std.nitrogen6"
maxusers 32
+# Board Type
+options EVBARM_BOARDTYPE=cubox_i
+
# CPU options
options CPU_CORTEX
options CPU_CORTEXA9
Index: src/sys/arch/evbarm/conf/std.nitrogen6
diff -u src/sys/arch/evbarm/conf/std.nitrogen6:1.2 src/sys/arch/evbarm/conf/std.nitrogen6:1.3
--- src/sys/arch/evbarm/conf/std.nitrogen6:1.2 Wed Feb 25 08:11:48 2015
+++ src/sys/arch/evbarm/conf/std.nitrogen6 Thu Jul 30 08:09:36 2015
@@ -1,4 +1,4 @@
-# $NetBSD: std.nitrogen6,v 1.2 2015/02/25 08:11:48 ryo Exp $
+# $NetBSD: std.nitrogen6,v 1.3 2015/07/30 08:09:36 ryo Exp $
#
# standard NetBSD/evbarm options for Nitrogen6X
@@ -22,8 +22,6 @@ options FPU_VFP
options CORTEX_PMC
options CORTEX_PMC_CCNT_HZ=792000000
-options EVBARM_BOARDTYPE="nitrogen6"
-
options KERNEL_BASE_EXT=0x80000000
makeoptions KERNEL_BASE_PHYS="0x10800000"
makeoptions KERNEL_BASE_VIRT="0x80800000"
Index: src/sys/arch/evbarm/conf/NITROGEN6X
diff -u src/sys/arch/evbarm/conf/NITROGEN6X:1.4 src/sys/arch/evbarm/conf/NITROGEN6X:1.5
--- src/sys/arch/evbarm/conf/NITROGEN6X:1.4 Sat Oct 11 11:55:07 2014
+++ src/sys/arch/evbarm/conf/NITROGEN6X Thu Jul 30 08:09:36 2015
@@ -1,4 +1,4 @@
-# $NetBSD: NITROGEN6X,v 1.4 2014/10/11 11:55:07 uebayasi Exp $
+# $NetBSD: NITROGEN6X,v 1.5 2015/07/30 08:09:36 ryo Exp $
#
# Nitrogen6X
# - http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/
@@ -12,6 +12,9 @@ include "arch/evbarm/conf/std.nitrogen6"
maxusers 32
+# Board Type
+options EVBARM_BOARDTYPE=nitrogen6x
+
# CPU options
options CPU_CORTEX
options CPU_CORTEXA9
Index: src/sys/arch/evbarm/conf/files.nitrogen6
diff -u src/sys/arch/evbarm/conf/files.nitrogen6:1.1 src/sys/arch/evbarm/conf/files.nitrogen6:1.2
--- src/sys/arch/evbarm/conf/files.nitrogen6:1.1 Thu Sep 25 05:05:28 2014
+++ src/sys/arch/evbarm/conf/files.nitrogen6 Thu Jul 30 08:09:36 2015
@@ -1,9 +1,10 @@
-# $NetBSD: files.nitrogen6,v 1.1 2014/09/25 05:05:28 ryo Exp $
+# $NetBSD: files.nitrogen6,v 1.2 2015/07/30 08:09:36 ryo Exp $
#
# Nitrogen6X
#
file arch/evbarm/nitrogen6/nitrogen6_machdep.c
+file arch/evbarm/nitrogen6/nitrogen6_iomux.c
# Kernel boot arguments
defparam opt_machdep.h BOOT_ARGS
Index: src/sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c
diff -u src/sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c:1.2 src/sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c:1.3
--- src/sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c:1.2 Wed Feb 25 08:11:49 2015
+++ src/sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c Thu Jul 30 08:09:37 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nitrogen6_machdep.c,v 1.2 2015/02/25 08:11:49 ryo Exp $ */
+/* $NetBSD: nitrogen6_machdep.c,v 1.3 2015/07/30 08:09:37 ryo Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nitrogen6_machdep.c,v 1.2 2015/02/25 08:11:49 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nitrogen6_machdep.c,v 1.3 2015/07/30 08:09:37 ryo Exp $");
#include "opt_evbarm_boardtype.h"
#include "opt_arm_debug.h"
@@ -94,6 +94,8 @@ u_int uboot_args[4] = { 0 };
#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
#endif
+void nitrogen6_setup_iomux(void);
+
static const bus_addr_t comcnaddr = (bus_addr_t)CONADDR;
static const int comcnspeed = CONSPEED;
static const int comcnmode = CONMODE | CLOCAL;
@@ -169,6 +171,9 @@ initarm(void *arg)
arm_cpu_max = (scu_cfg & SCU_CFG_CPUMAX) + 1;
membar_producer();
#endif /* MULTIPROCESSOR */
+
+ nitrogen6_setup_iomux();
+
consinit();
/*
Added files:
Index: src/sys/arch/evbarm/nitrogen6/nitrogen6_iomux.c
diff -u /dev/null src/sys/arch/evbarm/nitrogen6/nitrogen6_iomux.c:1.1
--- /dev/null Thu Jul 30 08:09:37 2015
+++ src/sys/arch/evbarm/nitrogen6/nitrogen6_iomux.c Thu Jul 30 08:09:37 2015
@@ -0,0 +1,102 @@
+/* $NetBSD: nitrogen6_iomux.c,v 1.1 2015/07/30 08:09:37 ryo Exp $ */
+
+/*
+ * Copyright (c) 2015 Ryo Shimizu <r...@nerv.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: nitrogen6_iomux.c,v 1.1 2015/07/30 08:09:37 ryo Exp $");
+
+#include "opt_evbarm_boardtype.h"
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/param.h>
+#include <arm/imx/imx6_reg.h>
+#include <arm/imx/imx6var.h>
+#include <arm/imx/imx6_iomuxreg.h>
+#include <evbarm/nitrogen6/platform.h>
+
+void nitrogen6_setup_iomux(void);
+static void nitrogen6_mux_config(const struct iomux_conf *);
+
+#define nitrogen6x __LINE__
+#define nitrogen6max __LINE__
+#define cubox_i __LINE__
+
+static const struct iomux_conf iomux_data[] = {
+#if (EVBARM_BOARDTYPE == nitrogen6x) || \
+ (EVBARM_BOARDTYPE == nitrogen6max)
+ /* UART1 RX */
+ {
+ .pin = MUX_PIN(SD3_DATA6),
+ .mux = IOMUX_CONFIG_ALT1,
+ .pad = PAD_CTL_HYS | PAD_CTL_PUS_22K_PU | PAD_CTL_PULL |
+ PAD_CTL_SPEED_100MHZ | PAD_CTL_DSE_40OHM | PAD_CTL_SRE_FAST
+ },
+ {
+ .pin = IOMUX_PIN(IOMUX_MUX_NONE,
+ IOMUXC_UART1_UART_RX_DATA_SELECT_INPUT),
+ .pad = INPUT_DAISY_3
+ },
+ /* UART1 TX */
+ {
+ .pin = MUX_PIN(SD3_DATA7),
+ .mux = IOMUX_CONFIG_ALT1,
+ .pad = PAD_CTL_HYS | PAD_CTL_PUS_22K_PU | PAD_CTL_PULL |
+ PAD_CTL_ODE |
+ PAD_CTL_SPEED_100MHZ | PAD_CTL_DSE_40OHM | PAD_CTL_SRE_FAST
+ },
+#endif
+
+ /* end of table */
+ {.pin = IOMUX_CONF_EOT}
+};
+
+#define AIPS1_WRITE(addr, val) \
+ (*(volatile uint32_t *)(KERNEL_IO_IOREG_VBASE + (addr)) = (val))
+#define IOMUX_WRITE(reg, val) \
+ AIPS1_WRITE(AIPS1_IOMUXC_BASE + (reg), val)
+
+static void
+nitrogen6_mux_config(const struct iomux_conf *conflist)
+{
+ int i;
+ uint32_t reg;
+
+ for (i = 0; conflist[i].pin != IOMUX_CONF_EOT; i++) {
+ reg = IOMUX_PIN_TO_PAD_ADDRESS(conflist[i].pin);
+ if (reg != IOMUX_PAD_NONE)
+ IOMUX_WRITE(reg, conflist[i].pad);
+
+ reg = IOMUX_PIN_TO_MUX_ADDRESS(conflist[i].pin);
+ if (reg != IOMUX_MUX_NONE)
+ IOMUX_WRITE(reg, conflist[i].mux);
+ }
+}
+
+void
+nitrogen6_setup_iomux(void)
+{
+ nitrogen6_mux_config(iomux_data);
+}
