Module Name: src
Committed By: jmcneill
Date: Sun Oct 18 15:42:00 UTC 2015
Modified Files:
src/sys/external/bsd/drm2/dist/drm/nouveau: Makefile
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device:
nouveau_engine_device_nve0.c
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph: ctxnvc0.h
nouveau_engine_graph_ctxnve4.c nouveau_engine_graph_nvc0.c
nouveau_engine_graph_nve4.c nvc0.h
src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine: fifo.h
graph.h
src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev: fb.h
ibus.h
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar:
nouveau_subdev_bar_base.c nouveau_subdev_bar_nvc0.c
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb: priv.h
src/sys/external/bsd/drm2/nouveau: files.nouveau
Added Files:
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo:
nouveau_engine_fifo_gk20a.c
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph:
nouveau_engine_graph_ctxgk20a.c nouveau_engine_graph_gk20a.c
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb:
nouveau_subdev_fb_gk20a.c nouveau_subdev_fb_ramgk20a.c
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus:
nouveau_subdev_ibus_gk20a.c
Log Message:
Backport GK20A support from linux-3.16.
commits: 53d206bb4aadba255d20b70893ed5ba1d89f41e1
88ff3f5f63370a8ff5b0e34bdb58144bf1c2fa9b
90a5500c2bf0e83cd965128fce9ac1f5fa4f04f5
fef94f6272c6d1ce1c9177770f50f7281d61f5f6
86ebef722dab7f9ea4c5753640ef7d660c681985
b7c852a646b12051e61c4dde4ddaa6c14af9c80b
370eec76b67430f6055ebda07c820f02288d93b8
a4d4bbf130724c9a9a3dff673eb9342f1dbe2392
52e98f1a84094f9cfb36d02a73bc4271a71c70eb
ok riastradh@
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/Makefile
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_nve0.c
cvs rdiff -u -r0 -r1.1 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_gk20a.c
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/ctxnvc0.h \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnve4.c
\
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nve4.c
\
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nvc0.h
cvs rdiff -u -r0 -r1.1 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxgk20a.c
\
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_gk20a.c
cvs rdiff -u -r1.2 -r1.3 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nvc0.c
cvs rdiff -u -r1.2 -r1.3 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/fifo.h
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/graph.h
cvs rdiff -u -r1.2 -r1.3 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/fb.h
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/ibus.h
cvs rdiff -u -r1.2 -r1.3 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_base.c
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_nvc0.c
cvs rdiff -u -r0 -r1.1 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_gk20a.c
\
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramgk20a.c
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/priv.h
cvs rdiff -u -r0 -r1.1 \
src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus/nouveau_subdev_ibus_gk20a.c
cvs rdiff -u -r1.10 -r1.11 src/sys/external/bsd/drm2/nouveau/files.nouveau
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/Makefile
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/Makefile:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/Makefile:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/Makefile:1.1.1.1 Wed Jul 16 19:35:26 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/Makefile Sun Oct 18 15:41:59 2015
@@ -102,6 +102,7 @@ nouveau-y += core/subdev/fb/nvaa.o
nouveau-y += core/subdev/fb/nvaf.o
nouveau-y += core/subdev/fb/nvc0.o
nouveau-y += core/subdev/fb/nve0.o
+nouveau-y += core/subdev/fb/gk20a.o
nouveau-y += core/subdev/fb/gm107.o
nouveau-y += core/subdev/fb/ramnv04.o
nouveau-y += core/subdev/fb/ramnv10.o
@@ -117,6 +118,7 @@ nouveau-y += core/subdev/fb/ramnva3.o
nouveau-y += core/subdev/fb/ramnvaa.o
nouveau-y += core/subdev/fb/ramnvc0.o
nouveau-y += core/subdev/fb/ramnve0.o
+nouveau-y += core/subdev/fb/ramgk20a.o
nouveau-y += core/subdev/fb/ramgm107.o
nouveau-y += core/subdev/fb/sddr3.o
nouveau-y += core/subdev/fb/gddr5.o
@@ -136,6 +138,7 @@ nouveau-y += core/subdev/i2c/nv94.o
nouveau-y += core/subdev/i2c/nvd0.o
nouveau-y += core/subdev/ibus/nvc0.o
nouveau-y += core/subdev/ibus/nve0.o
+nouveau-y += core/subdev/ibus/gk20a.o
nouveau-y += core/subdev/instmem/base.o
nouveau-y += core/subdev/instmem/nv04.o
nouveau-y += core/subdev/instmem/nv40.o
@@ -245,6 +248,7 @@ nouveau-y += core/engine/fifo/nv50.o
nouveau-y += core/engine/fifo/nv84.o
nouveau-y += core/engine/fifo/nvc0.o
nouveau-y += core/engine/fifo/nve0.o
+nouveau-y += core/engine/fifo/gk20a.o
nouveau-y += core/engine/fifo/nv108.o
nouveau-y += core/engine/graph/ctxnv40.o
nouveau-y += core/engine/graph/ctxnv50.o
@@ -255,6 +259,7 @@ nouveau-y += core/engine/graph/ctxnvc8.o
nouveau-y += core/engine/graph/ctxnvd7.o
nouveau-y += core/engine/graph/ctxnvd9.o
nouveau-y += core/engine/graph/ctxnve4.o
+nouveau-y += core/engine/graph/ctxgk20a.o
nouveau-y += core/engine/graph/ctxnvf0.o
nouveau-y += core/engine/graph/ctxnv108.o
nouveau-y += core/engine/graph/ctxgm107.o
@@ -275,6 +280,7 @@ nouveau-y += core/engine/graph/nvc8.o
nouveau-y += core/engine/graph/nvd7.o
nouveau-y += core/engine/graph/nvd9.o
nouveau-y += core/engine/graph/nve4.o
+nouveau-y += core/engine/graph/gk20a.o
nouveau-y += core/engine/graph/nvf0.o
nouveau-y += core/engine/graph/nv108.o
nouveau-y += core/engine/graph/gm107.o
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_nve0.c
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_nve0.c:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_nve0.c:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_nve0.c:1.1.1.1 Wed Aug 6 12:36:24 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_nve0.c Sun Oct 18 15:42:00 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nouveau_engine_device_nve0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $ */
+/* $NetBSD: nouveau_engine_device_nve0.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $ */
/*
* Copyright 2012 Red Hat Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_device_nve0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_device_nve0.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $");
#include <subdev/bios.h>
#include <subdev/bus.h>
@@ -161,6 +161,23 @@ nve0_identify(struct nouveau_device *dev
device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
break;
+ case 0xea:
+ device->cname = "GK20A";
+ device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
+ device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
+ device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
+ device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass;
+ device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
+ device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
+ device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
+ device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
+ device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
+ device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
+ device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
+ device->oclass[NVDEV_ENGINE_GR ] = gk20a_graph_oclass;
+ device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
+ device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
+ break;
case 0xf0:
device->cname = "GK110";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/ctxnvc0.h
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/ctxnvc0.h:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/ctxnvc0.h:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/ctxnvc0.h:1.1.1.1 Thu Jul 17 01:50:58 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/ctxnvc0.h Sun Oct 18 15:42:00 2015
@@ -69,7 +69,9 @@ extern struct nouveau_oclass *nvd7_grctx
extern struct nouveau_oclass *nvd9_grctx_oclass;
extern struct nouveau_oclass *nve4_grctx_oclass;
+extern struct nouveau_oclass *gk20a_grctx_oclass;
void nve4_grctx_generate_main(struct nvc0_graph_priv *, struct nvc0_grctx *);
+void nve4_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *);
void nve4_grctx_generate_unkn(struct nvc0_graph_priv *);
void nve4_grctx_generate_r418bb8(struct nvc0_graph_priv *);
@@ -151,6 +153,13 @@ extern const struct nvc0_graph_init nve4
extern const struct nvc0_graph_init nve4_grctx_init_pes_0[];
+extern const struct nvc0_graph_pack nve4_grctx_pack_hub[];
+extern const struct nvc0_graph_pack nve4_grctx_pack_gpc[];
+extern const struct nvc0_graph_pack nve4_grctx_pack_tpc[];
+extern const struct nvc0_graph_pack nve4_grctx_pack_ppc[];
+extern const struct nvc0_graph_pack nve4_grctx_pack_icmd[];
+extern const struct nvc0_graph_init nve4_grctx_init_a097_0[];
+
extern const struct nvc0_graph_pack nvf0_grctx_pack_mthd[];
extern const struct nvc0_graph_init nvf0_grctx_init_pri_0[];
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnve4.c
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnve4.c:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnve4.c:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnve4.c:1.1.1.1 Wed Aug 6 12:36:25 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnve4.c Sun Oct 18 15:42:00 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nouveau_engine_graph_ctxnve4.c,v 1.1.1.1 2014/08/06 12:36:25 riastradh Exp $ */
+/* $NetBSD: nouveau_engine_graph_ctxnve4.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $ */
/*
* Copyright 2013 Red Hat Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_graph_ctxnve4.c,v 1.1.1.1 2014/08/06 12:36:25 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_graph_ctxnve4.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $");
#include "ctxnvc0.h"
@@ -277,13 +277,13 @@ nve4_grctx_init_icmd_0[] = {
{}
};
-static const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nve4_grctx_pack_icmd[] = {
{ nve4_grctx_init_icmd_0 },
{}
};
-static const struct nvc0_graph_init
+const struct nvc0_graph_init
nve4_grctx_init_a097_0[] = {
{ 0x000800, 8, 0x40, 0x00000000 },
{ 0x000804, 8, 0x40, 0x00000000 },
@@ -702,7 +702,7 @@ nve4_grctx_init_be_0[] = {
{}
};
-static const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nve4_grctx_pack_hub[] = {
{ nvc0_grctx_init_main_0 },
{ nve4_grctx_init_fe_0 },
@@ -742,7 +742,7 @@ nve4_grctx_init_gpm_0[] = {
{}
};
-static const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nve4_grctx_pack_gpc[] = {
{ nvc0_grctx_init_gpc_unk_0 },
{ nvd9_grctx_init_prop_0 },
@@ -807,7 +807,7 @@ nve4_grctx_init_sm_0[] = {
{}
};
-static const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nve4_grctx_pack_tpc[] = {
{ nvd7_grctx_init_pe_0 },
{ nve4_grctx_init_tex_0 },
@@ -831,7 +831,7 @@ nve4_grctx_init_cbm_0[] = {
{}
};
-static const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nve4_grctx_pack_ppc[] = {
{ nve4_grctx_init_pes_0 },
{ nve4_grctx_init_cbm_0 },
@@ -843,7 +843,7 @@ nve4_grctx_pack_ppc[] = {
* PGRAPH context implementation
******************************************************************************/
-static void
+void
nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
u32 magic[GPC_MAX][2];
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nve4.c
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nve4.c:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nve4.c:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nve4.c:1.1.1.1 Wed Aug 6 12:36:26 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nve4.c Sun Oct 18 15:42:00 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nouveau_engine_graph_nve4.c,v 1.1.1.1 2014/08/06 12:36:26 riastradh Exp $ */
+/* $NetBSD: nouveau_engine_graph_nve4.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $ */
/*
* Copyright 2013 Red Hat Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_graph_nve4.c,v 1.1.1.1 2014/08/06 12:36:26 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_graph_nve4.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $");
#include "nvc0.h"
#include "ctxnvc0.h"
@@ -156,7 +156,7 @@ nve4_graph_init_be_0[] = {
{}
};
-static const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nve4_graph_pack_mmio[] = {
{ nve4_graph_init_main_0 },
{ nvc0_graph_init_fe_0 },
@@ -194,7 +194,7 @@ nve4_graph_pack_mmio[] = {
* PGRAPH engine/subdev functions
******************************************************************************/
-static int
+int
nve4_graph_fini(struct nouveau_object *object, bool suspend)
{
struct nvc0_graph_priv *priv = (void *)object;
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nvc0.h
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nvc0.h:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nvc0.h:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nvc0.h:1.1.1.1 Thu Jul 17 01:50:58 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nvc0.h Sun Oct 18 15:42:00 2015
@@ -116,6 +116,7 @@ int nvc0_graph_ctor(struct nouveau_obje
struct nouveau_object **);
void nvc0_graph_dtor(struct nouveau_object *);
int nvc0_graph_init(struct nouveau_object *);
+int nve4_graph_fini(struct nouveau_object *, bool);
int nve4_graph_init(struct nouveau_object *);
extern struct nouveau_oclass nvc0_graph_sclass[];
@@ -217,6 +218,7 @@ extern const struct nvc0_graph_init nve4
extern const struct nvc0_graph_init nve4_graph_init_tpccs_0[];
extern const struct nvc0_graph_init nve4_graph_init_pe_0[];
extern const struct nvc0_graph_init nve4_graph_init_be_0[];
+extern const struct nvc0_graph_pack nve4_graph_pack_mmio[];
extern const struct nvc0_graph_init nvf0_graph_init_fe_0[];
extern const struct nvc0_graph_init nvf0_graph_init_sked_0[];
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nvc0.c
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nvc0.c:1.2 src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nvc0.c:1.3
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nvc0.c:1.2 Sat Aug 23 08:03:33 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nvc0.c Sun Oct 18 15:42:00 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nouveau_engine_graph_nvc0.c,v 1.2 2014/08/23 08:03:33 riastradh Exp $ */
+/* $NetBSD: nouveau_engine_graph_nvc0.c,v 1.3 2015/10/18 15:42:00 jmcneill Exp $ */
/*
* Copyright 2012 Red Hat Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_graph_nvc0.c,v 1.2 2014/08/23 08:03:33 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_graph_nvc0.c,v 1.3 2015/10/18 15:42:00 jmcneill Exp $");
#include <linux/string.h> /* XXX */
@@ -901,6 +901,10 @@ nvc0_graph_init_fw(struct nvc0_graph_pri
nv_wr32(priv, fuc_base + 0x0188, i >> 6);
nv_wr32(priv, fuc_base + 0x0184, code->data[i]);
}
+
+ /* code must be padded to 0x40 words */
+ for (; i & 0x3f; i++)
+ nv_wr32(priv, fuc_base + 0x0184, 0);
}
static void
@@ -1266,10 +1270,14 @@ nvc0_graph_ctor(struct nouveau_object *p
struct nvc0_graph_oclass *oclass = (void *)bclass;
struct nouveau_device *device = nv_device(parent);
struct nvc0_graph_priv *priv;
+ bool use_ext_fw, enable;
int ret, i;
- ret = nouveau_graph_create(parent, engine, bclass,
- (oclass->fecs.ucode != NULL), &priv);
+ use_ext_fw = nouveau_boolopt(device->cfgopt, "NvGrUseFW",
+ oclass->fecs.ucode == NULL);
+ enable = use_ext_fw || oclass->fecs.ucode != NULL;
+
+ ret = nouveau_graph_create(parent, engine, bclass, enable, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
@@ -1279,7 +1287,7 @@ nvc0_graph_ctor(struct nouveau_object *p
priv->base.units = nvc0_graph_units;
- if (nouveau_boolopt(device->cfgopt, "NvGrUseFW", false)) {
+ if (use_ext_fw) {
nv_info(priv, "using external firmware\n");
if (nvc0_graph_ctor_fw(priv, "fuc409c", &priv->fuc409c) ||
nvc0_graph_ctor_fw(priv, "fuc409d", &priv->fuc409d) ||
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/fifo.h
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/fifo.h:1.2 src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/fifo.h:1.3
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/fifo.h:1.2 Wed Aug 6 15:01:33 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/fifo.h Sun Oct 18 15:42:00 2015
@@ -114,6 +114,7 @@ extern struct nouveau_oclass *nv50_fifo_
extern struct nouveau_oclass *nv84_fifo_oclass;
extern struct nouveau_oclass *nvc0_fifo_oclass;
extern struct nouveau_oclass *nve0_fifo_oclass;
+extern struct nouveau_oclass *gk20a_fifo_oclass;
extern struct nouveau_oclass *nv108_fifo_oclass;
void nv04_fifo_intr(struct nouveau_subdev *);
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/graph.h
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/graph.h:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/graph.h:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/graph.h:1.1.1.1 Thu Jul 17 01:50:59 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/engine/graph.h Sun Oct 18 15:42:00 2015
@@ -68,6 +68,7 @@ extern struct nouveau_oclass *nvc8_graph
extern struct nouveau_oclass *nvd7_graph_oclass;
extern struct nouveau_oclass *nvd9_graph_oclass;
extern struct nouveau_oclass *nve4_graph_oclass;
+extern struct nouveau_oclass *gk20a_graph_oclass;
extern struct nouveau_oclass *nvf0_graph_oclass;
extern struct nouveau_oclass *nv108_graph_oclass;
extern struct nouveau_oclass *gm107_graph_oclass;
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/fb.h
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/fb.h:1.2 src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/fb.h:1.3
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/fb.h:1.2 Sat Aug 23 08:03:34 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/fb.h Sun Oct 18 15:42:00 2015
@@ -109,6 +109,7 @@ extern struct nouveau_oclass *nvaa_fb_oc
extern struct nouveau_oclass *nvaf_fb_oclass;
extern struct nouveau_oclass *nvc0_fb_oclass;
extern struct nouveau_oclass *nve0_fb_oclass;
+extern struct nouveau_oclass *gk20a_fb_oclass;
extern struct nouveau_oclass *gm107_fb_oclass;
#include <subdev/bios/ramcfg.h>
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/ibus.h
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/ibus.h:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/ibus.h:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/ibus.h:1.1.1.1 Thu Jul 17 01:50:59 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/ibus.h Sun Oct 18 15:42:00 2015
@@ -30,5 +30,6 @@ nouveau_ibus(void *obj)
extern struct nouveau_oclass nvc0_ibus_oclass;
extern struct nouveau_oclass nve0_ibus_oclass;
+extern struct nouveau_oclass gk20a_ibus_oclass;
#endif
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_base.c
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_base.c:1.2 src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_base.c:1.3
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_base.c:1.2 Sat Aug 23 08:03:34 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_base.c Sun Oct 18 15:42:00 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nouveau_subdev_bar_base.c,v 1.2 2014/08/23 08:03:34 riastradh Exp $ */
+/* $NetBSD: nouveau_subdev_bar_base.c,v 1.3 2015/10/18 15:42:00 jmcneill Exp $ */
/*
* Copyright 2012 Red Hat Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_bar_base.c,v 1.2 2014/08/23 08:03:34 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_bar_base.c,v 1.3 2015/10/18 15:42:00 jmcneill Exp $");
#include <core/object.h>
@@ -145,14 +145,17 @@ nouveau_bar_create_(struct nouveau_objec
return ret;
#ifdef __NetBSD__
- bar->iomemt = nv_device_resource_tag(device, 3);
- bar->iomemsz = nv_device_resource_len(device, 3);
- if (bus_space_map(bar->iomemt, nv_device_resource_start(device, 3),
- bar->iomemsz, 0, &bar->iomemh))
- bar->iomemsz = 0; /* XXX Fail? */
-#else
- bar->iomem = ioremap(nv_device_resource_start(device, 3),
- nv_device_resource_len(device, 3));
+ if (nv_device_resource_len(device, 3) != 0) {
+ bar->iomemt = nv_device_resource_tag(device, 3);
+ bar->iomemsz = nv_device_resource_len(device, 3);
+ if (bus_space_map(bar->iomemt, nv_device_resource_start(device, 3),
+ bar->iomemsz, 0, &bar->iomemh))
+ bar->iomemsz = 0; /* XXX Fail? */
+ }
+#else
+ if (nv_device_resource_len(device, 3) != 0)
+ bar->iomem = ioremap(nv_device_resource_start(device, 3),
+ nv_device_resource_len(device, 3));
#endif
return 0;
}
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_nvc0.c
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_nvc0.c:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_nvc0.c:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_nvc0.c:1.1.1.1 Wed Aug 6 12:36:28 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bar/nouveau_subdev_bar_nvc0.c Sun Oct 18 15:42:00 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: nouveau_subdev_bar_nvc0.c,v 1.1.1.1 2014/08/06 12:36:28 riastradh Exp $ */
+/* $NetBSD: nouveau_subdev_bar_nvc0.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $ */
/*
* Copyright 2012 Red Hat Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_bar_nvc0.c,v 1.1.1.1 2014/08/06 12:36:28 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_bar_nvc0.c,v 1.2 2015/10/18 15:42:00 jmcneill Exp $");
#include <core/gpuobj.h>
@@ -35,14 +35,16 @@ __KERNEL_RCSID(0, "$NetBSD: nouveau_subd
#include "priv.h"
+struct nvc0_bar_priv_vm {
+ struct nouveau_gpuobj *mem;
+ struct nouveau_gpuobj *pgd;
+ struct nouveau_vm *vm;
+};
+
struct nvc0_bar_priv {
struct nouveau_bar base;
spinlock_t lock;
- struct {
- struct nouveau_gpuobj *mem;
- struct nouveau_gpuobj *pgd;
- struct nouveau_vm *vm;
- } bar[2];
+ struct nvc0_bar_priv_vm bar[2];
};
static int
@@ -84,87 +86,87 @@ nvc0_bar_unmap(struct nouveau_bar *bar,
}
static int
-nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
+nvc0_bar_init_vm(struct nvc0_bar_priv *priv, struct nvc0_bar_priv_vm *bar_vm,
+ int bar_nr)
{
- struct nouveau_device *device = nv_device(parent);
- struct nvc0_bar_priv *priv;
- struct nouveau_gpuobj *mem;
+ struct nouveau_device *device = nv_device(&priv->base);
struct nouveau_vm *vm;
+ resource_size_t bar_len;
int ret;
- ret = nouveau_bar_create(parent, engine, oclass, &priv);
- *pobject = nv_object(priv);
- if (ret)
- return ret;
-
- /* BAR3 */
ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
- &priv->bar[0].mem);
- mem = priv->bar[0].mem;
+ &bar_vm->mem);
if (ret)
return ret;
ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0, 0,
- &priv->bar[0].pgd);
+ &bar_vm->pgd);
if (ret)
return ret;
- ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 3), 0, &vm);
+ bar_len = nv_device_resource_len(device, bar_nr);
+
+ ret = nouveau_vm_new(device, 0, bar_len, 0, &vm);
if (ret)
return ret;
atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
- ret = nouveau_gpuobj_new(nv_object(priv), NULL,
- (nv_device_resource_len(device, 3) >> 12) * 8,
- 0x1000, NVOBJ_FLAG_ZERO_ALLOC,
- &vm->pgt[0].obj[0]);
- vm->pgt[0].refcount[0] = 1;
- if (ret)
- return ret;
+ /*
+ * Bootstrap page table lookup.
+ */
+ if (bar_nr == 3) {
+ ret = nouveau_gpuobj_new(nv_object(priv), NULL,
+ (bar_len >> 12) * 8, 0x1000,
+ NVOBJ_FLAG_ZERO_ALLOC,
+ &vm->pgt[0].obj[0]);
+ vm->pgt[0].refcount[0] = 1;
+ if (ret)
+ return ret;
+ }
- ret = nouveau_vm_ref(vm, &priv->bar[0].vm, priv->bar[0].pgd);
+ ret = nouveau_vm_ref(vm, &bar_vm->vm, bar_vm->pgd);
nouveau_vm_ref(NULL, &vm, NULL);
if (ret)
return ret;
- nv_wo32(mem, 0x0200, lower_32_bits(priv->bar[0].pgd->addr));
- nv_wo32(mem, 0x0204, upper_32_bits(priv->bar[0].pgd->addr));
- nv_wo32(mem, 0x0208, lower_32_bits(nv_device_resource_len(device, 3) - 1));
- nv_wo32(mem, 0x020c, upper_32_bits(nv_device_resource_len(device, 3) - 1));
+ nv_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
+ nv_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
+ nv_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
+ nv_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
- /* BAR1 */
- ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
- &priv->bar[1].mem);
- mem = priv->bar[1].mem;
- if (ret)
- return ret;
+ return 0;
+}
- ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0, 0,
- &priv->bar[1].pgd);
- if (ret)
- return ret;
+static int
+nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, void *data, u32 size,
+ struct nouveau_object **pobject)
+{
+ struct nouveau_device *device = nv_device(parent);
+ struct nvc0_bar_priv *priv;
+ bool has_bar3 = nv_device_resource_len(device, 3) != 0;
+ int ret;
- ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 1), 0, &vm);
+ ret = nouveau_bar_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
if (ret)
return ret;
- atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
+ /* BAR3 */
+ if (has_bar3) {
+ ret = nvc0_bar_init_vm(priv, &priv->bar[0], 3);
+ if (ret)
+ return ret;
+ priv->base.alloc = nouveau_bar_alloc;
+ priv->base.kmap = nvc0_bar_kmap;
+ }
- ret = nouveau_vm_ref(vm, &priv->bar[1].vm, priv->bar[1].pgd);
- nouveau_vm_ref(NULL, &vm, NULL);
+ /* BAR1 */
+ ret = nvc0_bar_init_vm(priv, &priv->bar[1], 1);
if (ret)
return ret;
- nv_wo32(mem, 0x0200, lower_32_bits(priv->bar[1].pgd->addr));
- nv_wo32(mem, 0x0204, upper_32_bits(priv->bar[1].pgd->addr));
- nv_wo32(mem, 0x0208, lower_32_bits(nv_device_resource_len(device, 1) - 1));
- nv_wo32(mem, 0x020c, upper_32_bits(nv_device_resource_len(device, 1) - 1));
-
- priv->base.alloc = nouveau_bar_alloc;
- priv->base.kmap = nvc0_bar_kmap;
priv->base.umap = nvc0_bar_umap;
priv->base.unmap = nvc0_bar_unmap;
priv->base.flush = nv84_bar_flush;
@@ -206,7 +208,9 @@ nvc0_bar_init(struct nouveau_object *obj
nv_mask(priv, 0x100c80, 0x00000001, 0x00000000);
nv_wr32(priv, 0x001704, 0x80000000 | priv->bar[1].mem->addr >> 12);
- nv_wr32(priv, 0x001714, 0xc0000000 | priv->bar[0].mem->addr >> 12);
+ if (priv->bar[0].mem)
+ nv_wr32(priv, 0x001714,
+ 0xc0000000 | priv->bar[0].mem->addr >> 12);
return 0;
}
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/priv.h
diff -u src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/priv.h:1.1.1.1 src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/priv.h:1.2
--- src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/priv.h:1.1.1.1 Thu Jul 17 01:50:59 2014
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/priv.h Sun Oct 18 15:42:00 2015
@@ -32,6 +32,7 @@ extern struct nouveau_oclass nva3_ram_oc
extern struct nouveau_oclass nvaa_ram_oclass;
extern struct nouveau_oclass nvc0_ram_oclass;
extern struct nouveau_oclass nve0_ram_oclass;
+extern struct nouveau_oclass gk20a_ram_oclass;
extern struct nouveau_oclass gm107_ram_oclass;
int nouveau_sddr3_calc(struct nouveau_ram *ram);
Index: src/sys/external/bsd/drm2/nouveau/files.nouveau
diff -u src/sys/external/bsd/drm2/nouveau/files.nouveau:1.10 src/sys/external/bsd/drm2/nouveau/files.nouveau:1.11
--- src/sys/external/bsd/drm2/nouveau/files.nouveau:1.10 Sat Oct 17 17:32:18 2015
+++ src/sys/external/bsd/drm2/nouveau/files.nouveau Sun Oct 18 15:42:00 2015
@@ -1,4 +1,4 @@
-# $NetBSD: files.nouveau,v 1.10 2015/10/17 17:32:18 jmcneill Exp $
+# $NetBSD: files.nouveau,v 1.11 2015/10/18 15:42:00 jmcneill Exp $
define nouveaufbbus { }
device nouveau: drmkms, drmkms_ttm, nouveaufbbus
@@ -321,6 +321,7 @@ file external/bsd/drm2/dist/drm/nouveau/
file external/bsd/drm2/dist/drm/nouveau/core/engine/dmaobj/nouveau_engine_dmaobj_nvc0.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/dmaobj/nouveau_engine_dmaobj_nvd0.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_base.c nouveau
+file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_gk20a.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv04.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv10.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv108.c nouveau
@@ -330,6 +331,7 @@ file external/bsd/drm2/dist/drm/nouveau/
file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv84.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nvc0.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nve0.c nouveau
+file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxgk20a.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxgm107.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnv108.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnv40.c nouveau
@@ -342,6 +344,7 @@ file external/bsd/drm2/dist/drm/nouveau/
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnvd9.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnve4.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxnvf0.c nouveau
+file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_gk20a.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_gm107.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nv04.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nv10.c nouveau
@@ -446,6 +449,7 @@ file external/bsd/drm2/dist/drm/nouveau/
file external/bsd/drm2/dist/drm/nouveau/core/subdev/devinit/nouveau_subdev_devinit_nvc0.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_base.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_gddr5.c nouveau
+file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_gk20a.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_gm107.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_nv04.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_nv10.c nouveau
@@ -469,6 +473,7 @@ file external/bsd/drm2/dist/drm/nouveau/
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_nvaf.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_nvc0.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_nve0.c nouveau
+file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramgk20a.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramgm107.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnv04.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnv10.c nouveau
@@ -499,6 +504,7 @@ file external/bsd/drm2/dist/drm/nouveau/
file external/bsd/drm2/dist/drm/nouveau/core/subdev/i2c/nouveau_subdev_i2c_nv50.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/i2c/nouveau_subdev_i2c_nv94.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/i2c/nouveau_subdev_i2c_nvd0.c nouveau
+file external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus/nouveau_subdev_ibus_gk20a.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus/nouveau_subdev_ibus_nvc0.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus/nouveau_subdev_ibus_nve0.c nouveau
file external/bsd/drm2/dist/drm/nouveau/core/subdev/instmem/nouveau_subdev_instmem_base.c nouveau
Added files:
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_gk20a.c
diff -u /dev/null src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_gk20a.c:1.1
--- /dev/null Sun Oct 18 15:42:00 2015
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_gk20a.c Sun Oct 18 15:42:00 2015
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "nve0.h"
+
+struct nouveau_oclass *
+gk20a_fifo_oclass = &(struct nve0_fifo_impl) {
+ .base.handle = NV_ENGINE(FIFO, 0xea),
+ .base.ofuncs = &(struct nouveau_ofuncs) {
+ .ctor = nve0_fifo_ctor,
+ .dtor = nve0_fifo_dtor,
+ .init = nve0_fifo_init,
+ .fini = nve0_fifo_fini,
+ },
+ .channels = 128,
+}.base;
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxgk20a.c
diff -u /dev/null src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxgk20a.c:1.1
--- /dev/null Sun Oct 18 15:42:00 2015
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_ctxgk20a.c Sun Oct 18 15:42:00 2015
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "ctxnvc0.h"
+
+static const struct nvc0_graph_pack
+gk20a_grctx_pack_mthd[] = {
+ { nve4_grctx_init_a097_0, 0xa297 },
+ { nvc0_grctx_init_902d_0, 0x902d },
+ {}
+};
+
+struct nouveau_oclass *
+gk20a_grctx_oclass = &(struct nvc0_grctx_oclass) {
+ .base.handle = NV_ENGCTX(GR, 0xea),
+ .base.ofuncs = &(struct nouveau_ofuncs) {
+ .ctor = nvc0_graph_context_ctor,
+ .dtor = nvc0_graph_context_dtor,
+ .init = _nouveau_graph_context_init,
+ .fini = _nouveau_graph_context_fini,
+ .rd32 = _nouveau_graph_context_rd32,
+ .wr32 = _nouveau_graph_context_wr32,
+ },
+ .main = nve4_grctx_generate_main,
+ .mods = nve4_grctx_generate_mods,
+ .unkn = nve4_grctx_generate_unkn,
+ .hub = nve4_grctx_pack_hub,
+ .gpc = nve4_grctx_pack_gpc,
+ .zcull = nvc0_grctx_pack_zcull,
+ .tpc = nve4_grctx_pack_tpc,
+ .ppc = nve4_grctx_pack_ppc,
+ .icmd = nve4_grctx_pack_icmd,
+ .mthd = gk20a_grctx_pack_mthd,
+}.base;
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_gk20a.c
diff -u /dev/null src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_gk20a.c:1.1
--- /dev/null Sun Oct 18 15:42:00 2015
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_gk20a.c Sun Oct 18 15:42:00 2015
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "nvc0.h"
+#include "ctxnvc0.h"
+
+static struct nouveau_oclass
+gk20a_graph_sclass[] = {
+ { 0x902d, &nouveau_object_ofuncs },
+ { 0xa040, &nouveau_object_ofuncs },
+ { 0xa297, &nouveau_object_ofuncs },
+ { 0xa0c0, &nouveau_object_ofuncs },
+ {}
+};
+
+struct nouveau_oclass *
+gk20a_graph_oclass = &(struct nvc0_graph_oclass) {
+ .base.handle = NV_ENGINE(GR, 0xea),
+ .base.ofuncs = &(struct nouveau_ofuncs) {
+ .ctor = nvc0_graph_ctor,
+ .dtor = nvc0_graph_dtor,
+ .init = nve4_graph_init,
+ .fini = nve4_graph_fini,
+ },
+ .cclass = &gk20a_grctx_oclass,
+ .sclass = gk20a_graph_sclass,
+ .mmio = nve4_graph_pack_mmio,
+}.base;
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_gk20a.c
diff -u /dev/null src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_gk20a.c:1.1
--- /dev/null Sun Oct 18 15:42:00 2015
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_gk20a.c Sun Oct 18 15:42:00 2015
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "nvc0.h"
+
+struct gk20a_fb_priv {
+ struct nouveau_fb base;
+};
+
+static int
+gk20a_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, void *data, u32 size,
+ struct nouveau_object **pobject)
+{
+ struct gk20a_fb_priv *priv;
+ int ret;
+
+ ret = nouveau_fb_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+struct nouveau_oclass *
+gk20a_fb_oclass = &(struct nouveau_fb_impl) {
+ .base.handle = NV_SUBDEV(FB, 0xea),
+ .base.ofuncs = &(struct nouveau_ofuncs) {
+ .ctor = gk20a_fb_ctor,
+ .dtor = _nouveau_fb_dtor,
+ .init = _nouveau_fb_init,
+ .fini = _nouveau_fb_fini,
+ },
+ .memtype = nvc0_fb_memtype_valid,
+ .ram = &gk20a_ram_oclass,
+}.base;
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramgk20a.c
diff -u /dev/null src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramgk20a.c:1.1
--- /dev/null Sun Oct 18 15:42:00 2015
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramgk20a.c Sun Oct 18 15:42:00 2015
@@ -0,0 +1,220 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "priv.h"
+
+#include <subdev/fb.h>
+#include <linux/mm.h>
+
+struct gk20a_mem {
+ struct nouveau_mem base;
+ void *cpuaddr;
+ dma_addr_t handle;
+#if defined(__NetBSD__)
+ bus_dma_segment_t dmaseg;
+ bus_size_t dmasize;
+#endif
+};
+#define to_gk20a_mem(m) container_of(m, struct gk20a_mem, base)
+
+static void
+gk20a_ram_put(struct nouveau_fb *pfb, struct nouveau_mem **pmem)
+{
+ struct gk20a_mem *mem = to_gk20a_mem(*pmem);
+
+ *pmem = NULL;
+ if (unlikely(mem == NULL))
+ return;
+
+#if defined(__NetBSD__)
+ if (likely(mem->base.pages)) {
+ const bus_dma_tag_t dmat = nv_device(pfb)->platformdev->dmat;
+ bus_dmamap_unload(dmat, mem->base.pages);
+ bus_dmamem_unmap(dmat, mem->cpuaddr, mem->dmasize);
+ bus_dmamap_destroy(dmat, mem->base.pages);
+ bus_dmamem_free(dmat, &mem->dmaseg, 1);
+ }
+#else
+ struct device *dev = nv_device_base(nv_device(pfb));
+ if (likely(mem->cpuaddr))
+ dma_free_coherent(dev, mem->base.size << PAGE_SHIFT,
+ mem->cpuaddr, mem->handle);
+
+ kfree(mem->base.pages);
+#endif
+ kfree(mem);
+}
+
+static int
+gk20a_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
+ u32 memtype, struct nouveau_mem **pmem)
+{
+#if !defined(__NetBSD__)
+ struct device *dev = nv_device_base(nv_device(pfb));
+ int i;
+#endif
+ struct gk20a_mem *mem;
+ u32 type = memtype & 0xff;
+ u32 npages, order;
+
+ nv_debug(pfb, "%s: size: %llx align: %x, ncmin: %x\n", __func__, size,
+ align, ncmin);
+
+ npages = size >> PAGE_SHIFT;
+ if (npages == 0)
+ npages = 1;
+
+ if (align == 0)
+ align = PAGE_SIZE;
+ align >>= PAGE_SHIFT;
+
+ /* round alignment to the next power of 2, if needed */
+#if defined(__NetBSD__)
+ order = fls32(align);
+#else
+ order = fls(align);
+#endif
+ if ((align & (align - 1)) == 0)
+ order--;
+ align = BIT(order);
+
+ /* ensure returned address is correctly aligned */
+ npages = max(align, npages);
+
+ mem = kzalloc(sizeof(*mem), GFP_KERNEL);
+ if (!mem)
+ return -ENOMEM;
+
+ mem->base.size = npages;
+ mem->base.memtype = type;
+
+#if defined(__NetBSD__)
+ int ret, nsegs;
+
+ if (align == 0)
+ align = PAGE_SIZE;
+
+ const bus_dma_tag_t dmat = nv_device(pfb)->platformdev->dmat;
+ const bus_size_t dmasize = npages << PAGE_SHIFT;
+
+ ret = -bus_dmamem_alloc(dmat, dmasize, align, 0,
+ &mem->dmaseg, 1, &nsegs, BUS_DMA_WAITOK);
+ if (ret) {
+fail0: kfree(mem);
+ return ret;
+ }
+ KASSERT(nsegs == 1);
+
+ ret = -bus_dmamap_create(dmat, dmasize, nsegs, dmasize, 0,
+ BUS_DMA_WAITOK, &mem->base.pages);
+ if (ret) {
+fail1: bus_dmamem_free(dmat, &mem->dmaseg, nsegs);
+ goto fail0;
+ }
+
+ ret = -bus_dmamem_map(dmat, &mem->dmaseg, nsegs, dmasize,
+ &mem->cpuaddr, BUS_DMA_WAITOK);
+ if (ret) {
+fail2: bus_dmamap_destroy(dmat, mem->base.pages);
+ goto fail1;
+ }
+ memset(mem->cpuaddr, 0, dmasize);
+
+ ret = -bus_dmamap_load(dmat, mem->base.pages, mem->cpuaddr,
+ dmasize, NULL, BUS_DMA_WAITOK);
+ if (ret) {
+fail3: __unused bus_dmamem_unmap(dmat, mem->cpuaddr, dmasize);
+ goto fail2;
+ }
+
+ nv_debug(pfb, "alloc size: 0x%x, align: 0x%x, paddr: %p, vaddr: %p\n",
+ npages << PAGE_SHIFT, align, &mem->handle, mem->cpuaddr);
+
+ mem->dmasize = dmasize;
+ mem->base.offset = (u64)mem->base.pages->dm_segs[0].ds_addr;
+ *pmem = &mem->base;
+#else
+ mem->base.pages = kzalloc(sizeof(dma_addr_t) * npages, GFP_KERNEL);
+ if (!mem->base.pages) {
+ kfree(mem);
+ return -ENOMEM;
+ }
+
+ *pmem = &mem->base;
+
+ mem->cpuaddr = dma_alloc_coherent(dev, npages << PAGE_SHIFT,
+ &mem->handle, GFP_KERNEL);
+ if (!mem->cpuaddr) {
+ nv_error(pfb, "%s: cannot allocate memory!\n", __func__);
+ gk20a_ram_put(pfb, pmem);
+ return -ENOMEM;
+ }
+
+ align <<= PAGE_SHIFT;
+
+ /* alignment check */
+ if (unlikely(mem->handle & (align - 1)))
+ nv_warn(pfb, "memory not aligned as requested: %pad (0x%x)\n",
+ &mem->handle, align);
+
+ nv_debug(pfb, "alloc size: 0x%x, align: 0x%x, paddr: %pad, vaddr: %p\n",
+ npages << PAGE_SHIFT, align, &mem->handle, mem->cpuaddr);
+
+ for (i = 0; i < npages; i++)
+ mem->base.pages[i] = mem->handle + (PAGE_SIZE * i);
+
+ mem->base.offset = (u64)mem->base.pages[0];
+#endif
+
+ return 0;
+}
+
+static int
+gk20a_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, void *data, u32 datasize,
+ struct nouveau_object **pobject)
+{
+ struct nouveau_ram *ram;
+ int ret;
+
+ ret = nouveau_ram_create(parent, engine, oclass, &ram);
+ *pobject = nv_object(ram);
+ if (ret)
+ return ret;
+ ram->type = NV_MEM_TYPE_STOLEN;
+ ram->size = get_num_physpages() << PAGE_SHIFT;
+
+ ram->get = gk20a_ram_get;
+ ram->put = gk20a_ram_put;
+
+ return 0;
+}
+
+struct nouveau_oclass
+gk20a_ram_oclass = {
+ .ofuncs = &(struct nouveau_ofuncs) {
+ .ctor = gk20a_ram_ctor,
+ .dtor = _nouveau_ram_dtor,
+ .init = _nouveau_ram_init,
+ .fini = _nouveau_ram_fini,
+ },
+};
Index: src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus/nouveau_subdev_ibus_gk20a.c
diff -u /dev/null src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus/nouveau_subdev_ibus_gk20a.c:1.1
--- /dev/null Sun Oct 18 15:42:00 2015
+++ src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/ibus/nouveau_subdev_ibus_gk20a.c Sun Oct 18 15:42:00 2015
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <subdev/ibus.h>
+#include <subdev/timer.h>
+
+struct gk20a_ibus_priv {
+ struct nouveau_ibus base;
+};
+
+static void
+gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv)
+{
+ nv_mask(priv, 0x137250, 0x3f, 0);
+
+ nv_mask(priv, 0x000200, 0x20, 0);
+ usleep_range(20, 30);
+ nv_mask(priv, 0x000200, 0x20, 0x20);
+
+ nv_wr32(priv, 0x12004c, 0x4);
+ nv_wr32(priv, 0x122204, 0x2);
+ nv_rd32(priv, 0x122204);
+}
+
+static void
+gk20a_ibus_intr(struct nouveau_subdev *subdev)
+{
+ struct gk20a_ibus_priv *priv = (void *)subdev;
+ u32 status0 = nv_rd32(priv, 0x120058);
+
+ if (status0 & 0x7) {
+ nv_debug(priv, "resetting priv ring\n");
+ gk20a_ibus_init_priv_ring(priv);
+ }
+
+ /* Acknowledge interrupt */
+ nv_mask(priv, 0x12004c, 0x2, 0x2);
+
+ if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00))
+ nv_warn(priv, "timeout waiting for ringmaster ack\n");
+}
+
+static int
+gk20a_ibus_init(struct nouveau_object *object)
+{
+ struct gk20a_ibus_priv *priv = (void *)object;
+ int ret;
+
+ ret = _nouveau_ibus_init(object);
+ if (ret)
+ return ret;
+
+ gk20a_ibus_init_priv_ring(priv);
+
+ return 0;
+}
+
+static int
+gk20a_ibus_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, void *data, u32 size,
+ struct nouveau_object **pobject)
+{
+ struct gk20a_ibus_priv *priv;
+ int ret;
+
+ ret = nouveau_ibus_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
+ if (ret)
+ return ret;
+
+ nv_subdev(priv)->intr = gk20a_ibus_intr;
+ return 0;
+}
+
+struct nouveau_oclass
+gk20a_ibus_oclass = {
+ .handle = NV_SUBDEV(IBUS, 0xea),
+ .ofuncs = &(struct nouveau_ofuncs) {
+ .ctor = gk20a_ibus_ctor,
+ .dtor = _nouveau_ibus_dtor,
+ .init = gk20a_ibus_init,
+ .fini = _nouveau_ibus_fini,
+ },
+};
