Module Name: src
Committed By: macallan
Date: Sat Dec 26 16:48:54 UTC 2015
Modified Files:
src/sys/arch/arm/allwinner: awin_reg.h
Log Message:
add registers for TV encoder / VGA output
To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/arm/allwinner/awin_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_reg.h
diff -u src/sys/arch/arm/allwinner/awin_reg.h:1.84 src/sys/arch/arm/allwinner/awin_reg.h:1.85
--- src/sys/arch/arm/allwinner/awin_reg.h:1.84 Sun Nov 15 21:28:54 2015
+++ src/sys/arch/arm/allwinner/awin_reg.h Sat Dec 26 16:48:54 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_reg.h,v 1.84 2015/11/15 21:28:54 bouyer Exp $ */
+/* $NetBSD: awin_reg.h,v 1.85 2015/12/26 16:48:54 macallan Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -2305,6 +2305,47 @@ struct awin_mmc_idma_descriptor {
#define AWIN_MP_CMDQUESTS_FINISHIRQ_FLAG __BIT(8)
/*
+ * TVE registers
+ */
+
+#define AWIN_TVE_ENABLE 0x00000000
+#define AWIN_TVE_CONFIG 0x00000004
+#define AWIN_TVE_DAC_1 0x00000008
+#define AWIN_TVE_NOTCH 0x0000000c
+#define AWIN_TVE_CHROMA 0x00000010
+#define AWIN_TVE_PORCH 0x00000014
+#define AWIN_TVE_VSYNC 0x00000018
+#define AWIN_TVE_LINENUMBER 0x0000001C
+#define AWIN_TVE_LEVEL 0x00000020
+#define AWIN_TVE_DAC_2 0x00000024
+#define AWIN_TVE_AUTODETECT_E 0x00000030
+#define AWIN_TVE_AUTODETECT_INTR 0x00000034
+#define AWIN_TVE_AUTODETECT_STATUS 0x00000038
+#define AWIN_TVE_AUTODETECT_DEBOUNCE 0x0000003C
+#define AWIN_TVE_CSC_1 0x00000040
+#define AWIN_TVE_CSC_2 0x00000044
+#define AWIN_TVE_CSC_3 0x00000048
+#define AWIN_TVE_CSC_4 0x0000004C
+#define AWIN_TVE_COLOR_BURST 0x00000100
+#define AWIN_TVE_VSYNC_NUMBER 0x00000104
+#define AWIN_TVE_NOTCH_FREQ 0x00000108
+#define AWIN_TVE_CBCR 0x0000010C
+#define AWIN_TVE_TINT 0x00000110
+#define AWIN_TVE_BURST_WIDTH 0x00000114
+#define AWIN_TVE_CBCR_GAIN 0x00000118
+#define AWIN_TVE_SYNC_VBI 0x0000011C
+#define AWIN_TVE_WHITE_LEVEL 0x00000120
+#define AWIN_TVE_ACTIVE_LINE 0x00000124
+#define AWIN_TVE_CHROMA_COMPGAIN 0x00000128
+#define AWIN_TVE_TVENC 0x0000012C
+#define AWIN_TVE_RESYNC 0x00000130
+#define AWIN_TVE_SLAVE_PARAM 0x00000134
+#define AWIN_TVE_CONFIG_2 0x00000138
+#define AWIN_TVE_CONFIG_3 0x0000013C
+
+
+
+/*
* A31 registers
*/
#define AWIN_A31_USB0_OFFSET 0x00019000 /* OTG */
