Module Name: src
Committed By: snj
Date: Sat Dec 26 22:23:20 UTC 2015
Modified Files:
src/sys/dev/ic [netbsd-7]: dwc_gmac_reg.h
Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #1053):
sys/dev/ic/dwc_gmac_reg.h: revision 1.15
Fix an off by one in the bit definition for RX store and forward mode.
Pointed out by ganbold.
While there add a few other bits of the same register.
To generate a diff of this commit:
cvs rdiff -u -r1.12.2.3 -r1.12.2.4 src/sys/dev/ic/dwc_gmac_reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/ic/dwc_gmac_reg.h
diff -u src/sys/dev/ic/dwc_gmac_reg.h:1.12.2.3 src/sys/dev/ic/dwc_gmac_reg.h:1.12.2.4
--- src/sys/dev/ic/dwc_gmac_reg.h:1.12.2.3 Tue Feb 3 08:11:21 2015
+++ src/sys/dev/ic/dwc_gmac_reg.h Sat Dec 26 22:23:20 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: dwc_gmac_reg.h,v 1.12.2.3 2015/02/03 08:11:21 bouyer Exp $ */
+/* $NetBSD: dwc_gmac_reg.h,v 1.12.2.4 2015/12/26 22:23:20 snj Exp $ */
/*-
* Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
@@ -131,8 +131,13 @@
#define AWIN_GMAC_MII_IRQ __BIT(0)
-#define GMAC_DMA_OP_RXSTOREFORWARD __BIT(24) /* start RX when a
+#define GMAC_DMA_OP_DISABLECSDROP __BIT(26) /* disable dropping of
+ frames with TCP/IP
+ checksum errors */
+#define GMAC_DMA_OP_RXSTOREFORWARD __BIT(25) /* start RX when a
full frame is available */
+#define GMAC_DMA_OP_DISABLERXFLUSH __BIT(24) /* Do not drop frames
+ when out of RX descr. */
#define GMAC_DMA_OP_TXSTOREFORWARD __BIT(21) /* start TX when a
full frame is available */
#define GMAC_DMA_OP_FLUSHTX __BIT(20) /* flush TX fifo */
