Module Name:    src
Committed By:   hikaru
Date:           Sat Feb 13 08:05:07 UTC 2016

Modified Files:
        src/sys/dev/marvell: if_mvxpe.c if_mvxpevar.h

Log Message:
Make all packets are enqueued into queue 0.
queue 7 is not default, it is caused by the filter tables.
The fields are including queue number, not bitfields.
So MVXPE_DF_QUEUE_ALL (b111) means queue 7.

And also, pass all unicast addresses if it is promisc mode.
MVXPE_PXC_UPM is working in almost cases,
but this change is needed for some cases; bridging frames through inter units,
using products have consecutive MAC addresses.


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/dev/marvell/if_mvxpe.c
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/marvell/if_mvxpevar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/marvell/if_mvxpe.c
diff -u src/sys/dev/marvell/if_mvxpe.c:1.11 src/sys/dev/marvell/if_mvxpe.c:1.12
--- src/sys/dev/marvell/if_mvxpe.c:1.11	Sat Feb 13 06:44:22 2016
+++ src/sys/dev/marvell/if_mvxpe.c	Sat Feb 13 08:05:06 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_mvxpe.c,v 1.11 2016/02/13 06:44:22 hikaru Exp $	*/
+/*	$NetBSD: if_mvxpe.c,v 1.12 2016/02/13 08:05:06 hikaru Exp $	*/
 /*
  * Copyright (c) 2015 Internet Initiative Japan Inc.
  * All rights reserved.
@@ -25,7 +25,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_mvxpe.c,v 1.11 2016/02/13 06:44:22 hikaru Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mvxpe.c,v 1.12 2016/02/13 08:05:06 hikaru Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -924,6 +924,13 @@ mvxpe_initreg(struct ifnet *ifp)
 
 	/* Port MAC Control set 4 is not used */
 
+	/* Port Configuration */
+	/* Use queue 0 only */
+	reg = MVXPE_READ(sc, MVXPE_PXC);
+	reg &= ~(MVXPE_PXC_RXQ_MASK | MVXPE_PXC_RXQARP_MASK |
+	    MVXPE_PXC_TCPQ_MASK | MVXPE_PXC_UDPQ_MASK | MVXPE_PXC_BPDUQ_MASK);
+	MVXPE_WRITE(sc, MVXPE_PXC, reg);
+
 	/* Port Configuration Extended: enable Tx CRC generation */
 	reg = MVXPE_READ(sc, MVXPE_PXCX);
 	reg &= ~MVXPE_PXCX_TXCRCDIS;
@@ -2717,11 +2724,11 @@ mvxpe_filter_setup(struct mvxpe_softc *s
 		if (memcmp(enm->enm_addrlo, special, 5) == 0) {
 			i = enm->enm_addrlo[5];
 			dfsmt[i>>2] |=
-			    MVXPE_DF(i&3, MVXPE_DF_QUEUE_ALL | MVXPE_DF_PASS);
+			    MVXPE_DF(i&3, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS);
 		} else {
 			i = mvxpe_crc8(enm->enm_addrlo, ETHER_ADDR_LEN);
 			dfomt[i>>2] |=
-			    MVXPE_DF(i&3, MVXPE_DF_QUEUE_ALL | MVXPE_DF_PASS);
+			    MVXPE_DF(i&3, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS);
 		}
 
 		ETHER_NEXT_MULTI(step, enm);
@@ -2732,10 +2739,10 @@ allmulti:
 	if (ifp->if_flags & (IFF_ALLMULTI|IFF_PROMISC)) {
 		for (i = 0; i < MVXPE_NDFSMT; i++) {
 			dfsmt[i] = dfomt[i] = 
-			    MVXPE_DF(0, MVXPE_DF_QUEUE_ALL | MVXPE_DF_PASS) |
-			    MVXPE_DF(1, MVXPE_DF_QUEUE_ALL | MVXPE_DF_PASS) |
-			    MVXPE_DF(2, MVXPE_DF_QUEUE_ALL | MVXPE_DF_PASS) |
-			    MVXPE_DF(3, MVXPE_DF_QUEUE_ALL | MVXPE_DF_PASS);
+			    MVXPE_DF(0, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS) |
+			    MVXPE_DF(1, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS) |
+			    MVXPE_DF(2, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS) |
+			    MVXPE_DF(3, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS);
 		}
 	}
 
@@ -2752,8 +2759,20 @@ set:
 	MVXPE_WRITE(sc, MVXPE_PXC, pxc);
 
 	/* Set Destination Address Filter Unicast Table */
-	i = sc->sc_enaddr[5] & 0xf;		/* last nibble */
-	dfut[i>>2] = MVXPE_DF(i&3, MVXPE_DF_QUEUE_ALL | MVXPE_DF_PASS);
+	if (ifp->if_flags & IFF_PROMISC) {
+		/* pass all unicast addresses */
+		for (i = 0; i < MVXPE_NDFUT; i++) {
+			dfut[i] =
+			    MVXPE_DF(0, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS) |
+			    MVXPE_DF(1, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS) |
+			    MVXPE_DF(2, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS) |
+			    MVXPE_DF(3, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS);
+		}
+	}
+	else {
+		i = sc->sc_enaddr[5] & 0xf;             /* last nibble */
+		dfut[i>>2] = MVXPE_DF(i&3, MVXPE_DF_QUEUE(0) | MVXPE_DF_PASS);
+	}
 	MVXPE_WRITE_REGION(sc, MVXPE_DFUT(0), dfut, MVXPE_NDFUT);
 
 	/* Set Destination Address Filter Multicast Tables */

Index: src/sys/dev/marvell/if_mvxpevar.h
diff -u src/sys/dev/marvell/if_mvxpevar.h:1.2 src/sys/dev/marvell/if_mvxpevar.h:1.3
--- src/sys/dev/marvell/if_mvxpevar.h:1.2	Wed Jun  3 03:55:47 2015
+++ src/sys/dev/marvell/if_mvxpevar.h	Sat Feb 13 08:05:06 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_mvxpevar.h,v 1.2 2015/06/03 03:55:47 hsuenaga Exp $	*/
+/*	$NetBSD: if_mvxpevar.h,v 1.3 2016/02/13 08:05:06 hikaru Exp $	*/
 /*
  * Copyright (c) 2015 Internet Initiative Japan Inc.
  * All rights reserved.
@@ -40,18 +40,17 @@
  * Default limit of queue length
  *
  * queue 0 is lowest priority and queue 7 is highest priority.
- * IP packet is received on queue 7 by default.
  *
  * XXX: packet classifier is not implement yet
  */
-#define MVXPE_RX_QUEUE_LIMIT_0	8
+#define MVXPE_RX_QUEUE_LIMIT_0	IFQ_MAXLEN
 #define MVXPE_RX_QUEUE_LIMIT_1	8
 #define MVXPE_RX_QUEUE_LIMIT_2	8
 #define MVXPE_RX_QUEUE_LIMIT_3	8
 #define MVXPE_RX_QUEUE_LIMIT_4	8
 #define MVXPE_RX_QUEUE_LIMIT_5	8
 #define MVXPE_RX_QUEUE_LIMIT_6	8
-#define MVXPE_RX_QUEUE_LIMIT_7	IFQ_MAXLEN
+#define MVXPE_RX_QUEUE_LIMIT_7	8
 
 #define MVXPE_TX_QUEUE_LIMIT_0	IFQ_MAXLEN
 #define MVXPE_TX_QUEUE_LIMIT_1	8

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