Module Name: src
Committed By: snj
Date: Fri Feb 26 22:52:53 UTC 2016
Modified Files:
src/external/broadcom/rpi-firmware/dist [netbsd-7]: LICENCE.broadcom
bootcode.bin fixup.dat fixup_cd.dat start.elf start_cd.elf
src/sys/arch/arm/broadcom [netbsd-7]: bcm2835_emmc.c bcm2835_gpio.c
bcm2835_gpio_subr.c bcm2835_space.c bcm2835reg.h
src/sys/arch/arm/cortex [netbsd-7]: a9_mpsubr.S
src/sys/arch/evbarm/conf [netbsd-7]: CUBIEBOARD std.awin
src/sys/arch/evbarm/rpi [netbsd-7]: rpi2_start.S rpi_machdep.c
Log Message:
Pull up following revision(s) (requested by skrll in ticket #1107):
external/broadcom/rpi-firmware/dist/LICENCE.broadcom: revision 1.2
external/broadcom/rpi-firmware/dist/bootcode.bin: revision 1.8
external/broadcom/rpi-firmware/dist/fixup.dat: revision 1.8
external/broadcom/rpi-firmware/dist/fixup_cd.dat: revision 1.8
external/broadcom/rpi-firmware/dist/start.elf: revision 1.8
external/broadcom/rpi-firmware/dist/start_cd.elf: revision 1.8
sys/arch/arm/broadcom/bcm2835_emmc.c: revision 1.29
sys/arch/arm/broadcom/bcm2835_gpio.c: revision 1.3
sys/arch/arm/broadcom/bcm2835_gpio_subr.c: revision 1.4
sys/arch/arm/broadcom/bcm2835_space.c: revision 1.9, 1.10
sys/arch/arm/broadcom/bcm2835reg.h: patch
sys/arch/arm/cortex/a9_mpsubr.S: revisions 1.45, 1.46
sys/arch/evbarm/conf/CUBIEBOARD: revision 1.45
sys/arch/evbarm/conf/std.awin: revision 1.9
sys/arch/evbarm/rpi/rpi2_start.S: revision 1.3
sys/arch/evbarm/rpi/rpi_machdep.c: revision 1.68
Check for hypervisor mode in cortex_init and exit if the cpu started
there.
Needed by latest RPI firmware.
--
Fix up bus_space_map for latest RPI firmware which now passes the FB
address in the mailbox properties as a bus address.
--
Update RPI firmware to version after the following commit
commit 224c75602b8bae1a9e942b4f1c7ed3aa8e0f0ec8
Author: popcornmix<popcorn...@gmail.com>
Date: Tue Dec 8 14:48:57 2015 +0000
--
Deal with kernel builds where virtualisation isn't available
--
Tweak CPUFLAGS to cover all CPUs
--
Fix up bcm283[56] bus_space(4) to really use bus addresses for
peripherals, etc
Simplifies the code in various places and uses the abstraction in
more places. (bcm2835_gpio_subr.c still doesn't)
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.1.14.1 \
src/external/broadcom/rpi-firmware/dist/LICENCE.broadcom
cvs rdiff -u -r1.5.2.1 -r1.5.2.2 \
src/external/broadcom/rpi-firmware/dist/bootcode.bin \
src/external/broadcom/rpi-firmware/dist/fixup.dat \
src/external/broadcom/rpi-firmware/dist/fixup_cd.dat \
src/external/broadcom/rpi-firmware/dist/start.elf \
src/external/broadcom/rpi-firmware/dist/start_cd.elf
cvs rdiff -u -r1.9.4.4 -r1.9.4.5 src/sys/arch/arm/broadcom/bcm2835_emmc.c
cvs rdiff -u -r1.2 -r1.2.6.1 src/sys/arch/arm/broadcom/bcm2835_gpio.c
cvs rdiff -u -r1.3 -r1.3.2.1 src/sys/arch/arm/broadcom/bcm2835_gpio_subr.c
cvs rdiff -u -r1.6.10.2 -r1.6.10.3 src/sys/arch/arm/broadcom/bcm2835_space.c
cvs rdiff -u -r1.10.12.4 -r1.10.12.5 src/sys/arch/arm/broadcom/bcm2835reg.h
cvs rdiff -u -r1.18.2.3 -r1.18.2.4 src/sys/arch/arm/cortex/a9_mpsubr.S
cvs rdiff -u -r1.12.2.5 -r1.12.2.6 src/sys/arch/evbarm/conf/CUBIEBOARD
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/evbarm/conf/std.awin
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/evbarm/rpi/rpi2_start.S
cvs rdiff -u -r1.43.2.5 -r1.43.2.6 src/sys/arch/evbarm/rpi/rpi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/external/broadcom/rpi-firmware/dist/LICENCE.broadcom
diff -u src/external/broadcom/rpi-firmware/dist/LICENCE.broadcom:1.1 src/external/broadcom/rpi-firmware/dist/LICENCE.broadcom:1.1.14.1
--- src/external/broadcom/rpi-firmware/dist/LICENCE.broadcom:1.1 Fri Oct 26 10:22:42 2012
+++ src/external/broadcom/rpi-firmware/dist/LICENCE.broadcom Fri Feb 26 22:52:52 2016
@@ -1,4 +1,5 @@
Copyright (c) 2006, Broadcom Corporation.
+Copyright (c) 2015, Raspberry Pi (Trading) Ltd
All rights reserved.
Redistribution. Redistribution and use in binary form, without
Index: src/external/broadcom/rpi-firmware/dist/bootcode.bin
Binary files are different
Index: src/external/broadcom/rpi-firmware/dist/fixup.dat
Binary files are different
Index: src/external/broadcom/rpi-firmware/dist/fixup_cd.dat
Binary files are different
Index: src/external/broadcom/rpi-firmware/dist/start.elf
Binary files are different
Index: src/external/broadcom/rpi-firmware/dist/start_cd.elf
Binary files are different
Index: src/sys/arch/arm/broadcom/bcm2835_emmc.c
diff -u src/sys/arch/arm/broadcom/bcm2835_emmc.c:1.9.4.4 src/sys/arch/arm/broadcom/bcm2835_emmc.c:1.9.4.5
--- src/sys/arch/arm/broadcom/bcm2835_emmc.c:1.9.4.4 Mon Dec 15 11:53:58 2014
+++ src/sys/arch/arm/broadcom/bcm2835_emmc.c Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_emmc.c,v 1.9.4.4 2014/12/15 11:53:58 martin Exp $ */
+/* $NetBSD: bcm2835_emmc.c,v 1.9.4.5 2016/02/26 22:52:53 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_emmc.c,v 1.9.4.4 2014/12/15 11:53:58 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_emmc.c,v 1.9.4.5 2016/02/26 22:52:53 snj Exp $");
#include "bcmdmac.h"
@@ -60,6 +60,7 @@ struct bcmemmc_softc {
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
+ bus_addr_t sc_iob;
bus_size_t sc_ios;
struct sdhc_host *sc_hosts[1];
void *sc_ih;
@@ -74,8 +75,6 @@ struct bcmemmc_softc {
bus_dmamap_t sc_dmamap;
bus_dma_segment_t sc_segs[1]; /* XXX assumes enough descriptors fit in one page */
struct bcm_dmac_conblk *sc_cblk;
-
- uint32_t sc_physaddr;
};
static int bcmemmc_match(device_t, struct cfdata *, void *);
@@ -137,8 +136,8 @@ bcmemmc_attach(device_t parent, device_t
"can't map registers for %s: %d\n", aaa->aaa_name, error);
return;
}
+ sc->sc_iob = aaa->aaa_addr;
sc->sc_ios = aaa->aaa_size;
- sc->sc_physaddr = aaa->aaa_addr;
aprint_naive(": SDHC controller\n");
aprint_normal(": SDHC controller\n");
@@ -265,8 +264,7 @@ bcmemmc_xfer_data_dma(struct sdhc_softc
sc->sc_cblk[seg].cb_ti |= DMAC_TI_DEST_WIDTH;
sc->sc_cblk[seg].cb_ti |= DMAC_TI_SRC_DREQ;
sc->sc_cblk[seg].cb_source_ad =
- BCM2835_PERIPHERALS_TO_BUS(sc->sc_physaddr +
- SDHC_DATA);
+ sc->sc_iob + SDHC_DATA;
sc->sc_cblk[seg].cb_dest_ad =
cmd->c_dmamap->dm_segs[seg].ds_addr;
} else {
@@ -282,8 +280,7 @@ bcmemmc_xfer_data_dma(struct sdhc_softc
sc->sc_cblk[seg].cb_source_ad =
cmd->c_dmamap->dm_segs[seg].ds_addr;
sc->sc_cblk[seg].cb_dest_ad =
- BCM2835_PERIPHERALS_TO_BUS(sc->sc_physaddr +
- SDHC_DATA);
+ sc->sc_iob + SDHC_DATA;
}
sc->sc_cblk[seg].cb_stride = 0;
if (seg == cmd->c_dmamap->dm_nsegs - 1) {
Index: src/sys/arch/arm/broadcom/bcm2835_gpio.c
diff -u src/sys/arch/arm/broadcom/bcm2835_gpio.c:1.2 src/sys/arch/arm/broadcom/bcm2835_gpio.c:1.2.6.1
--- src/sys/arch/arm/broadcom/bcm2835_gpio.c:1.2 Mon May 19 08:33:41 2014
+++ src/sys/arch/arm/broadcom/bcm2835_gpio.c Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_gpio.c,v 1.2 2014/05/19 08:33:41 skrll Exp $ */
+/* $NetBSD: bcm2835_gpio.c,v 1.2.6.1 2016/02/26 22:52:53 snj Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_gpio.c,v 1.2 2014/05/19 08:33:41 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_gpio.c,v 1.2.6.1 2016/02/26 22:52:53 snj Exp $");
/*
* Driver for BCM2835 GPIO
@@ -101,9 +101,11 @@ bcmgpio_attach(device_t parent, device_t
{
struct bcmgpio_softc * const sc = device_private(self);
#if NGPIO > 0
+ struct amba_attach_args *aaa = aux;
+ struct gpiobus_attach_args gba;
int pin, minpin, maxpin;
u_int func;
- struct gpiobus_attach_args gba;
+ int error;
#endif
sc->sc_dev = self;
@@ -124,10 +126,15 @@ bcmgpio_attach(device_t parent, device_t
aprint_naive("\n");
aprint_normal(": GPIO [%d...%d]\n", minpin, maxpin);
- /* already mapped - nothing to gain from struct amba_attach_args */
- sc->sc_iot = &bcm2835_bs_tag;
- sc->sc_ioh = BCM2835_IOPHYSTOVIRT(BCM2835_GPIO_BASE);
-
+ sc->sc_iot = aaa->aaa_iot;
+ error = bus_space_map(sc->sc_iot, aaa->aaa_addr, aaa->aaa_size, 0,
+ &sc->sc_ioh);
+ if (error) {
+ aprint_error_dev(self,
+ "can't map registers for %s: %d\n", aaa->aaa_name, error);
+ return;
+ }
+
for (pin = minpin; pin <= maxpin; pin++) {
int epin = pin - minpin;
Index: src/sys/arch/arm/broadcom/bcm2835_gpio_subr.c
diff -u src/sys/arch/arm/broadcom/bcm2835_gpio_subr.c:1.3 src/sys/arch/arm/broadcom/bcm2835_gpio_subr.c:1.3.2.1
--- src/sys/arch/arm/broadcom/bcm2835_gpio_subr.c:1.3 Tue Apr 22 18:51:35 2014
+++ src/sys/arch/arm/broadcom/bcm2835_gpio_subr.c Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_gpio_subr.c,v 1.3 2014/04/22 18:51:35 kardel Exp $ */
+/* $NetBSD: bcm2835_gpio_subr.c,v 1.3.2.1 2016/02/26 22:52:53 snj Exp $ */
/*
* Copyright (c) 2013 Jonathan A. Kollasch
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_gpio_subr.c,v 1.3 2014/04/22 18:51:35 kardel Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_gpio_subr.c,v 1.3.2.1 2016/02/26 22:52:53 snj Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -43,8 +43,9 @@ __KERNEL_RCSID(0, "$NetBSD: bcm2835_gpio
void
bcm2835gpio_function_select(u_int pin, u_int func)
{
+ const paddr_t iop = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_GPIO_BASE);
const bus_space_tag_t iot = &bcm2835_bs_tag;
- const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(BCM2835_GPIO_BASE);
+ const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(iop);
const u_int mask = (1 << BCM2835_GPIO_GPFSEL_BITS_PER_PIN) - 1;
const u_int regid = (pin / BCM2835_GPIO_GPFSEL_PINS_PER_REGISTER);
const u_int shift = (pin % BCM2835_GPIO_GPFSEL_PINS_PER_REGISTER) *
@@ -70,8 +71,9 @@ bcm2835gpio_function_select(u_int pin, u
u_int
bcm2835gpio_function_read(u_int pin)
{
+ const paddr_t iop = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_GPIO_BASE);
const bus_space_tag_t iot = &bcm2835_bs_tag;
- const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(BCM2835_GPIO_BASE);
+ const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(iop);
const u_int mask = (1 << BCM2835_GPIO_GPFSEL_BITS_PER_PIN) - 1;
const u_int regid = (pin / BCM2835_GPIO_GPFSEL_PINS_PER_REGISTER);
const u_int shift = (pin % BCM2835_GPIO_GPFSEL_PINS_PER_REGISTER) *
Index: src/sys/arch/arm/broadcom/bcm2835_space.c
diff -u src/sys/arch/arm/broadcom/bcm2835_space.c:1.6.10.2 src/sys/arch/arm/broadcom/bcm2835_space.c:1.6.10.3
--- src/sys/arch/arm/broadcom/bcm2835_space.c:1.6.10.2 Wed May 27 05:33:29 2015
+++ src/sys/arch/arm/broadcom/bcm2835_space.c Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_space.c,v 1.6.10.2 2015/05/27 05:33:29 msaitoh Exp $ */
+/* $NetBSD: bcm2835_space.c,v 1.6.10.3 2016/02/26 22:52:53 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.6.10.2 2015/05/27 05:33:29 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.6.10.3 2016/02/26 22:52:53 snj Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -290,20 +290,32 @@ bcm2835_bs_map(void *t, bus_addr_t ba, b
vaddr_t va;
const struct pmap_devmap *pd;
int pmap_flags;
+ bool match = false;
-
-#if defined(BCM2836)
- pa = ba;
-#else
- pa = ba & ~BCM2835_BUSADDR_CACHE_MASK;
+ /* Attempt to find the PA device mapping */
+ if (ba >= BCM2835_PERIPHERALS_BASE_BUS &&
+ ba < BCM2835_PERIPHERALS_BASE_BUS + BCM2835_PERIPHERALS_SIZE) {
+ match = true;
+ pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(ba);
+
+ }
+#ifdef BCM2836
+ if (ba >= BCM2836_ARM_LOCAL_BASE &&
+ ba < BCM2836_ARM_LOCAL_BASE + BCM2836_ARM_LOCAL_SIZE) {
+ match = true;
+ pa = ba;
+ }
#endif
- /* this does device addresses */
- if ((pd = pmap_devmap_find_pa(pa, size)) != NULL) {
+
+ if (match && (pd = pmap_devmap_find_pa(pa, size)) != NULL) {
/* Device was statically mapped. */
*bshp = pd->pd_va + (pa - pd->pd_pa);
return 0;
}
+ /* Now assume bus address so convert to PA */
+ pa = ba & ~BCM2835_BUSADDR_CACHE_MASK;
+
startpa = trunc_page(pa);
endpa = round_page(pa + size);
Index: src/sys/arch/arm/broadcom/bcm2835reg.h
diff -u src/sys/arch/arm/broadcom/bcm2835reg.h:1.10.12.4 src/sys/arch/arm/broadcom/bcm2835reg.h:1.10.12.5
--- src/sys/arch/arm/broadcom/bcm2835reg.h:1.10.12.4 Thu Jul 30 09:37:37 2015
+++ src/sys/arch/arm/broadcom/bcm2835reg.h Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835reg.h,v 1.10.12.4 2015/07/30 09:37:37 martin Exp $ */
+/* $NetBSD: bcm2835reg.h,v 1.10.12.5 2016/02/26 22:52:53 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
/*
* Reference: BCM2835 ARM Periperhals
*
- * http://dmkenr5gtnd8f.cloudfront.net/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
+ * http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
*/
#ifndef _BCM2835REG_H_
@@ -46,38 +46,45 @@
#define BCM2835_PERIPHERALS_BASE 0x20000000
#endif
#define BCM2835_PERIPHERALS_SIZE 0x01000000 /* 16MBytes */
+
#define BCM2835_PERIPHERALS_BASE_BUS 0x7e000000
-#define BCM2835_PERIPHERALS_TO_BUS(a) \
+#define BCM2835_PERIPHERALS_PHYS_TO_BUS(a) \
((a) - BCM2835_PERIPHERALS_BASE + BCM2835_PERIPHERALS_BASE_BUS)
+#define BCM2835_PERIPHERALS_BUS_TO_PHYS(a) \
+ ((a) - BCM2835_PERIPHERALS_BASE_BUS + BCM2835_PERIPHERALS_BASE)
-#define BCM2835_STIMER_BASE (BCM2835_PERIPHERALS_BASE + 0x00003000)
-#define BCM2835_DMA0_BASE (BCM2835_PERIPHERALS_BASE + 0x00007000)
-#define BCM2835_ARM_BASE (BCM2835_PERIPHERALS_BASE + 0x0000B000)
-#define BCM2835_PM_BASE (BCM2835_PERIPHERALS_BASE + 0x00100000)
-#define BCM2835_RNG_BASE (BCM2835_PERIPHERALS_BASE + 0x00104000)
-#define BCM2835_GPIO_BASE (BCM2835_PERIPHERALS_BASE + 0x00200000)
-#define BCM2835_UART0_BASE (BCM2835_PERIPHERALS_BASE + 0x00201000)
-#define BCM2835_PCM_BASE (BCM2835_PERIPHERALS_BASE + 0x00203000)
-#define BCM2835_SPI0_BASE (BCM2835_PERIPHERALS_BASE + 0x00204000)
-#define BCM2835_BSC0_BASE (BCM2835_PERIPHERALS_BASE + 0x00205000)
-#define BCM2835_BSCSPISLV_BASE (BCM2835_PERIPHERALS_BASE + 0x00214000)
-#define BCM2835_AUX_BASE (BCM2835_PERIPHERALS_BASE + 0x00215000)
-#define BCM2835_EMMC_BASE (BCM2835_PERIPHERALS_BASE + 0x00300000)
-#define BCM2835_BSC1_BASE (BCM2835_PERIPHERALS_BASE + 0x00804000)
-#define BCM2835_BSC2_BASE (BCM2835_PERIPHERALS_BASE + 0x00805000)
-#define BCM2835_USB_BASE (BCM2835_PERIPHERALS_BASE + 0x00980000)
-#define BCM2835_DMA15_BASE (BCM2835_PERIPHERALS_BASE + 0x00E05000)
+#define BCM2835_STIMER_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00003000)
+#define BCM2835_DMA0_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00007000)
+#define BCM2835_ARM_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x0000B000)
+#define BCM2835_PM_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00100000)
+#define BCM2835_CM_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00101000)
+#define BCM2835_RNG_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00104000)
+#define BCM2835_GPIO_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00200000)
+#define BCM2835_UART0_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00201000)
+#define BCM2835_PCM_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00203000)
+#define BCM2835_SPI0_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00204000)
+#define BCM2835_BSC0_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00205000)
+#define BCM2835_PWM_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x0020C000)
+#define BCM2835_BSCSPISLV_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00214000)
+#define BCM2835_AUX_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00215000)
+#define BCM2835_EMMC_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00300000)
+#define BCM2835_BSC1_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00804000)
+#define BCM2835_BSC2_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00805000)
+#define BCM2835_USB_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00980000)
+#define BCM2835_DMA15_BASE (BCM2835_PERIPHERALS_BASE_BUS + 0x00E05000)
#define BCM2835_STIMER_SIZE 0x1c
#define BCM2835_DMA0_SIZE 0x1000
#define BCM2835_ARM_SIZE 0x1000
#define BCM2835_PM_SIZE 0x1000
+#define BCM2835_CM_SIZE 0xa8
#define BCM2835_RNG_SIZE 0x1000
#define BCM2835_GPIO_SIZE 0x1000
#define BCM2835_UART0_SIZE 0x90
#define BCM2835_PCM_SIZE 0x1000
#define BCM2835_SPI0_SIZE 0x1000
#define BCM2835_BSC_SIZE 0x1000
+#define BCM2835_PWM_SIZE 0x28
#define BCM2835_AUX_SIZE 0x1000
#define BCM2835_EMMC_SIZE 0x1000
#define BCM2835_USB_SIZE 0x20000
@@ -94,10 +101,6 @@
#define BCM2835_PERIPHERALS_VBASE \
BCM2835_IOPHYSTOVIRT(BCM2835_PERIPHERALS_BASE)
-#define BCM2835_STIMER_VBASE BCM2835_IOPHYSTOVIRT(BCM2835_ST_BASE)
-#define BCM2835_PM_VBASE BCM2835_IOPHYSTOVIRT(BCM2835_PM_BASE)
-#define BCM2835_UART0_VBASE BCM2835_IOPHYSTOVIRT(BCM2835_UART0_BASE)
-#define BCM2835_EMMC_VBASE BCM2835_IOPHYSTOVIRT(BCM2835_EMMC_BASE)
#define BCM2835_ARMICU_BASE (BCM2835_ARM_BASE + 0x0200)
#define BCM2835_ARMICU_SIZE 0x200
@@ -108,8 +111,6 @@
#define BCM2835_ARMMBOX_BASE (BCM2835_ARM_BASE + 0x0880)
#define BCM2835_ARMMBOX_SIZE 0x40
-#define BCM2835_ARMICU_VBASE BCM2835_IOPHYSTOVIRT(BCM2835_ARMICU_BASE)
-
#define BCM2835_INTC_BASE (0x0) /* Relative to BCM2835_ARMICU_BASE */
/* Interrupt controller */
@@ -151,7 +152,10 @@
#define BCM2836_INT_TIMER 11
#define BCM2836_INT_NLOCAL 12
+#define BCM2836_INT_CNTPSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPSIRQ)
+#define BCM2836_INT_CNTPNSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPNSIRQ)
#define BCM2836_INT_CNTVIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ)
+#define BCM2836_INT_CNTHPIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTHPIRQ)
#define BCM2836_INT_MAILBOX0_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0)
#else
#define BCM2835_INT_BASE 0
Index: src/sys/arch/arm/cortex/a9_mpsubr.S
diff -u src/sys/arch/arm/cortex/a9_mpsubr.S:1.18.2.3 src/sys/arch/arm/cortex/a9_mpsubr.S:1.18.2.4
--- src/sys/arch/arm/cortex/a9_mpsubr.S:1.18.2.3 Sat Mar 21 08:51:18 2015
+++ src/sys/arch/arm/cortex/a9_mpsubr.S Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: a9_mpsubr.S,v 1.18.2.3 2015/03/21 08:51:18 snj Exp $ */
+/* $NetBSD: a9_mpsubr.S,v 1.18.2.4 2016/02/26 22:52:53 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -331,9 +331,31 @@ xputc:
cortex_init:
mov r10, lr // save lr
+#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15) || defined(CPU_CORTEXA17)
+ /* Leave HYP mode and move into supervisor mode with IRQs/FIQs disabled. */
+ mrs r0, cpsr
+ and r0, r0, #(PSR_MODE) /* Mode is in the low 5 bits of CPSR */
+ teq r0, #(PSR_HYP32_MODE) /* Hyp Mode? */
+ bne 1f
+
+ /* Ensure that IRQ, and FIQ will be disabled after eret */
+ mrs r0, cpsr
+ bic r0, r0, #(PSR_MODE)
+ orr r0, r0, #(PSR_SVC32_MODE)
+ orr r0, r0, #(I32_bit | F32_bit)
+ msr spsr_cxsf, r0
+ /* Exit hypervisor mode */
+ adr lr, 2f
+ msr elr_hyp, lr
+ eret
+#endif
+
+1:
cpsid if, #PSR_SVC32_MODE // SVC32 with no interrupts
- mov r0, #0
- msr spsr_sxc, r0 // set SPSR[23:8] to known value
+
+2:
+ mov r0, #0
+ msr spsr_sxc, r0 // set SPSR[23:8] to known value
XPUTC(#64)
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15) || defined(CPU_CORTEXA17)
Index: src/sys/arch/evbarm/conf/CUBIEBOARD
diff -u src/sys/arch/evbarm/conf/CUBIEBOARD:1.12.2.5 src/sys/arch/evbarm/conf/CUBIEBOARD:1.12.2.6
--- src/sys/arch/evbarm/conf/CUBIEBOARD:1.12.2.5 Sun Nov 16 10:33:57 2014
+++ src/sys/arch/evbarm/conf/CUBIEBOARD Fri Feb 26 22:52:53 2016
@@ -1,5 +1,5 @@
#
-# $NetBSD: CUBIEBOARD,v 1.12.2.5 2014/11/16 10:33:57 martin Exp $
+# $NetBSD: CUBIEBOARD,v 1.12.2.6 2016/02/26 22:52:53 snj Exp $
#
# CUBIEBOARD -- Allwinner A10/A20 Eval Board Kernel
#
@@ -19,6 +19,8 @@ options RTC_OFFSET=0 # hardware clock i
no makeoptions BOARDTYPE
makeoptions BOARDTYPE="cubieboard"
+no makeoptions CPUFLAGS
+makeoptions CPUFLAGS="-mcpu=cortex-a7 -mfpu=neon"
#options UVMHIST,UVMHIST_PRINT
options CPU_CORTEXA8
options CPU_CORTEXA7
Index: src/sys/arch/evbarm/conf/std.awin
diff -u src/sys/arch/evbarm/conf/std.awin:1.1.2.5 src/sys/arch/evbarm/conf/std.awin:1.1.2.6
--- src/sys/arch/evbarm/conf/std.awin:1.1.2.5 Thu Nov 13 09:55:45 2014
+++ src/sys/arch/evbarm/conf/std.awin Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-# $NetBSD: std.awin,v 1.1.2.5 2014/11/13 09:55:45 martin Exp $
+# $NetBSD: std.awin,v 1.1.2.6 2016/02/26 22:52:53 snj Exp $
#
# standard NetBSD/evbarm for Allwinner based options
@@ -26,7 +26,7 @@ makeoptions KERNEL_BASE_PHYS="0x40007800
makeoptions KERNEL_BASE_VIRT="0x80007800"
makeoptions BOARDTYPE="awin"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.awin"
-makeoptions CPUFLAGS="-mcpu=cortex-a8 -mfpu=neon"
+makeoptions CPUFLAGS="-mcpu=generic-armv7-a -mfpu=neon"
options ARM_INTR_IMPL="<arch/arm/allwinner/awin_intr.h>"
options ARM_GENERIC_TODR
Index: src/sys/arch/evbarm/rpi/rpi2_start.S
diff -u src/sys/arch/evbarm/rpi/rpi2_start.S:1.1.2.2 src/sys/arch/evbarm/rpi/rpi2_start.S:1.1.2.3
--- src/sys/arch/evbarm/rpi/rpi2_start.S:1.1.2.2 Wed Mar 11 20:22:56 2015
+++ src/sys/arch/evbarm/rpi/rpi2_start.S Fri Feb 26 22:52:53 2016
@@ -38,7 +38,7 @@
#include "assym.h"
-RCSID("$NetBSD: rpi2_start.S,v 1.1.2.2 2015/03/11 20:22:56 snj Exp $")
+RCSID("$NetBSD: rpi2_start.S,v 1.1.2.3 2016/02/26 22:52:53 snj Exp $")
#if defined(VERBOSE_INIT_ARM)
#define XPUTC(n) mov r0, n; bl plputc
@@ -78,11 +78,6 @@ _C_LABEL(rpi_start):
#ifdef __ARMEB__
setend be /* force big endian */
#endif
- mov r9, #0
-
- /* Move into supervisor mode and disable IRQs/FIQs. */
- cpsid if, #PSR_SVC32_MODE
-
/*
* Save any arguments passed to us.
*/
@@ -101,7 +96,7 @@ _C_LABEL(rpi_start):
stmia r4, {r0-r3} // Save the arguments
/*
- * Turn on the SMP bit
+ * Setup the CPU
*/
bl cortex_init
Index: src/sys/arch/evbarm/rpi/rpi_machdep.c
diff -u src/sys/arch/evbarm/rpi/rpi_machdep.c:1.43.2.5 src/sys/arch/evbarm/rpi/rpi_machdep.c:1.43.2.6
--- src/sys/arch/evbarm/rpi/rpi_machdep.c:1.43.2.5 Thu Jul 30 09:37:37 2015
+++ src/sys/arch/evbarm/rpi/rpi_machdep.c Fri Feb 26 22:52:53 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: rpi_machdep.c,v 1.43.2.5 2015/07/30 09:37:37 martin Exp $ */
+/* $NetBSD: rpi_machdep.c,v 1.43.2.6 2016/02/26 22:52:53 snj Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.43.2.5 2015/07/30 09:37:37 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rpi_machdep.c,v 1.43.2.6 2016/02/26 22:52:53 snj Exp $");
#include "opt_arm_debug.h"
#include "opt_bcm283x.h"
@@ -130,15 +130,7 @@ static void rpi_device_register(device_t
#define RPI_FB_HEIGHT 720
#endif
-#if 0
#define PLCONADDR BCM2835_UART0_BASE
-#endif
-
-#ifdef BCM2836
-#define PLCONADDR 0x3f201000
-#else
-#define PLCONADDR 0x20201000
-#endif
#ifndef CONSDEVNAME
#define CONSDEVNAME "plcom"
@@ -387,8 +379,9 @@ extern void bcmgenfb_ddb_trap_callback(i
static void
rpi_bootparams(void)
{
- bus_space_tag_t iot = &bcm2835_bs_tag;
- bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(BCM2835_ARMMBOX_BASE);
+ const paddr_t pa = BCM2835_PERIPHERALS_BUS_TO_PHYS(BCM2835_ARMMBOX_BASE);
+ const bus_space_tag_t iot = &bcm2835_bs_tag;
+ const bus_space_handle_t ioh = BCM2835_IOPHYSTOVIRT(pa);
uint32_t res;
bcm2835_mbox_write(iot, ioh, BCMMBOX_CHANPM, (
