Module Name: src
Committed By: jakllsch
Date: Mon Jun 6 12:25:37 UTC 2016
Modified Files:
src/sys/arch/arm/allwinner: awin_otgreg.h
Log Message:
Correct MUSB2_REG_RXNAKLIMIT offset on Allwinner.
This register is actually the RXINTERVAL register...
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/allwinner/awin_otgreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/awin_otgreg.h
diff -u src/sys/arch/arm/allwinner/awin_otgreg.h:1.4 src/sys/arch/arm/allwinner/awin_otgreg.h:1.5
--- src/sys/arch/arm/allwinner/awin_otgreg.h:1.4 Mon Oct 20 21:18:00 2014
+++ src/sys/arch/arm/allwinner/awin_otgreg.h Mon Jun 6 12:25:37 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_otgreg.h,v 1.4 2014/10/20 21:18:00 jmcneill Exp $ */
+/* $NetBSD: awin_otgreg.h,v 1.5 2016/06/06 12:25:37 jakllsch Exp $ */
/* FreeBSD: head/sys/dev/usb/controller/musb_otg.h 267122 2014-06-05 18:23:51Z hselasky */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
@@ -187,7 +187,7 @@
#define MUSB2_MASK_TI_EP_NUM 0x0F
#define MUSB2_REG_TXNAKLIMIT (0x000D /* EPN=0 */ + MUSB2_REG_INDEXED_CSR)
-#define MUSB2_REG_RXNAKLIMIT (0x000D /* EPN=0 */ + MUSB2_REG_INDEXED_CSR)
+#define MUSB2_REG_RXNAKLIMIT (0x000F /* EPN=0 */ + MUSB2_REG_INDEXED_CSR)
#define MUSB2_MASK_NAKLIMIT 0xFF
#define MUSB2_REG_FSIZE (0x0010 + MUSB2_REG_INDEXED_CSR)
