Module Name: src
Committed By: snj
Date: Wed Jun 22 08:26:05 UTC 2016
Modified Files:
src/sys/arch/arm/allwinner [netbsd-7]: files.awin
src/sys/conf [netbsd-7]: files
src/sys/dev/ic [netbsd-7]: com.c comreg.h comvar.h ns16550reg.h
Log Message:
Pull up following revision(s) (requested by bouyer in ticket #1178):
sys/arch/arm/allwinner/files.awin: revision 1.36
sys/conf/files: revision 1.1159
sys/dev/ic/com.c: revision 1.339
sys/dev/ic/comreg.h: revision 1.25
sys/dev/ic/comvar.h: revision 1.82
sys/dev/ic/ns16550reg.h: revision 1.11
The UART in the allwiner SoCs is not full-compatible with the 16550, and
it's not a 16750 either. Like the 16750 it has the IIR_BUSY interrupt,
which is triggered when writing to LCR while the chip
can't accept it. But unlike the 16750, it has a specific register,
HALT, to allow writing to the LCR and divisor registers, and then
commit the changes.
Tested on an A20 SoC, changing the baud rate while keeping the
tty device open and incoming data.
To generate a diff of this commit:
cvs rdiff -u -r1.8.10.4 -r1.8.10.5 src/sys/arch/arm/allwinner/files.awin
cvs rdiff -u -r1.1096.2.6 -r1.1096.2.7 src/sys/conf/files
cvs rdiff -u -r1.327 -r1.327.2.1 src/sys/dev/ic/com.c
cvs rdiff -u -r1.22 -r1.22.4.1 src/sys/dev/ic/comreg.h
cvs rdiff -u -r1.78 -r1.78.4.1 src/sys/dev/ic/comvar.h
cvs rdiff -u -r1.10 -r1.10.4.1 src/sys/dev/ic/ns16550reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/allwinner/files.awin
diff -u src/sys/arch/arm/allwinner/files.awin:1.8.10.4 src/sys/arch/arm/allwinner/files.awin:1.8.10.5
--- src/sys/arch/arm/allwinner/files.awin:1.8.10.4 Sun Nov 23 13:07:04 2014
+++ src/sys/arch/arm/allwinner/files.awin Wed Jun 22 08:26:05 2016
@@ -1,4 +1,4 @@
-# $NetBSD: files.awin,v 1.8.10.4 2014/11/23 13:07:04 martin Exp $
+# $NetBSD: files.awin,v 1.8.10.5 2016/06/22 08:26:05 snj Exp $
#
# Configuration info for Allwinner ARM Peripherals
#
@@ -64,7 +64,7 @@ attach awincnt at awinio with awin_cnt
file arch/arm/allwinner/awin_cnt.c awin_cnt
# A10/A20 UART
-options COM_16750 # for IIR_BUSY
+options COM_AWIN # for IIR_BUSY
attach com at awinio with awin_com
file arch/arm/allwinner/awin_com.c awin_com
Index: src/sys/conf/files
diff -u src/sys/conf/files:1.1096.2.6 src/sys/conf/files:1.1096.2.7
--- src/sys/conf/files:1.1096.2.6 Tue May 19 04:42:31 2015
+++ src/sys/conf/files Wed Jun 22 08:26:05 2016
@@ -1,4 +1,4 @@
-# $NetBSD: files,v 1.1096.2.6 2015/05/19 04:42:31 snj Exp $
+# $NetBSD: files,v 1.1096.2.7 2016/06/22 08:26:05 snj Exp $
# @(#)files.newconf 7.5 (Berkeley) 5/10/93
version 20100430
@@ -864,7 +864,7 @@ defflag opt_com.h COM_DEBUG
# XXX In a perfect world, this would be done with attributes
defflag opt_com.h COM_16650 COM_16750
COM_HAYESP COM_PXA2X0 COM_AU1X00
- COM_REGMAP COM_FUNCMAP
+ COM_REGMAP COM_FUNCMAP COM_AWIN
defparam opt_com.h COM_TOLERANCE
device com { } : tty
file dev/ic/com.c com needs-flag
Index: src/sys/dev/ic/com.c
diff -u src/sys/dev/ic/com.c:1.327 src/sys/dev/ic/com.c:1.327.2.1
--- src/sys/dev/ic/com.c:1.327 Sun Aug 10 16:44:35 2014
+++ src/sys/dev/ic/com.c Wed Jun 22 08:26:05 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: com.c,v 1.327 2014/08/10 16:44:35 tls Exp $ */
+/* $NetBSD: com.c,v 1.327.2.1 2016/06/22 08:26:05 snj Exp $ */
/*-
* Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com.c,v 1.327 2014/08/10 16:44:35 tls Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com.c,v 1.327.2.1 2016/06/22 08:26:05 snj Exp $");
#include "opt_com.h"
#include "opt_ddb.h"
@@ -425,7 +425,7 @@ com_attach_subr(struct com_softc *sc)
(u_long)comcons_info.regs.cr_iobase);
}
-#ifdef COM_16750
+#if defined(COM_16750) || defined(COM_AWIN)
/* Use in comintr(). */
sc->sc_lcr = cflag2lcr(comcons_info.cflag);
#endif
@@ -1536,7 +1536,7 @@ com_iflush(struct com_softc *sc)
aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg);
#endif
-#ifdef COM_16750
+#if defined(COM_16750) || defined(COM_AWIN)
uint8_t fifo;
/*
* Reset all Rx/Tx FIFO, preserve current FIFO length.
@@ -1978,6 +1978,9 @@ comintr(void *arg)
/* Handle ns16750-specific busy interrupt. */
#ifdef COM_16750
+#ifdef COM_AWIN
+#error "COM_16750 and COM_AWIN are exclusive"
+#endif
int timeout;
if ((iir & IIR_BUSY) == IIR_BUSY) {
for (timeout = 10000;
@@ -1994,7 +1997,39 @@ comintr(void *arg)
iir = CSR_READ_1(regsp, COM_REG_IIR);
}
#endif /* COM_16750 */
-
+#ifdef COM_AWIN
+ /* Allwinner BUSY interrupt */
+ if ((iir & IIR_BUSY) == IIR_BUSY) {
+ if ((CSR_READ_1(regsp, COM_REG_USR) & 0x1) != 0) {
+ CSR_WRITE_1(regsp, COM_REG_HALT, HALT_CHCFG_EN);
+ CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
+ CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
+ CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
+ CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
+ CSR_WRITE_1(regsp, COM_REG_HALT,
+ HALT_CHCFG_EN | HALT_CHCFG_UD);
+ for (int timeout = 10000000;
+ (CSR_READ_1(regsp, COM_REG_HALT) & HALT_CHCFG_UD) != 0;
+ timeout--) {
+ if (timeout <= 0) {
+ aprint_error_dev(sc->sc_dev,
+ "timeout while waiting for HALT "
+ "update acknowledge 0x%x 0x%x\n",
+ CSR_READ_1(regsp, COM_REG_HALT),
+ CSR_READ_1(regsp, COM_REG_USR));
+ break;
+ }
+ }
+ CSR_WRITE_1(regsp, COM_REG_HALT, 0);
+ (void)CSR_READ_1(regsp, COM_REG_USR);
+ } else {
+ CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
+ CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
+ CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
+ CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
+ }
+ }
+#endif /* COM_AWIN */
if (ISSET(iir, IIR_NOPEND)) {
mutex_spin_exit(&sc->sc_lock);
Index: src/sys/dev/ic/comreg.h
diff -u src/sys/dev/ic/comreg.h:1.22 src/sys/dev/ic/comreg.h:1.22.4.1
--- src/sys/dev/ic/comreg.h:1.22 Thu Oct 3 13:23:03 2013
+++ src/sys/dev/ic/comreg.h Wed Jun 22 08:26:05 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: comreg.h,v 1.22 2013/10/03 13:23:03 kiyohara Exp $ */
+/* $NetBSD: comreg.h,v 1.22.4.1 2016/06/22 08:26:05 snj Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -63,7 +63,7 @@
#define IIR_NOPEND 0x1 /* No pending interrupts */
#define IIR_64B_FIFO 0x20 /* 64byte FIFO Enabled (16750) */
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
-#ifdef COM_16750
+#if defined(COM_16750) || defined(COM_AWIN)
#define IIR_BUSY 0x7 /* Busy indicator */
#endif
@@ -156,6 +156,12 @@
#define MDR1_MODE_UART_16X 0x00
#define MDR1_MODE_MASK 0x07
+#ifdef COM_AWIN
+/* AWIN-specific registers */
+#define HALT_CHCFG_UD 0x04 /* apply updates to LCR/dividors */
+#define HALT_CHCFG_EN 0x02 /* enable change while busy */
+#endif
+
/* XXX ISA-specific. */
#define COM_NPORTS 8
Index: src/sys/dev/ic/comvar.h
diff -u src/sys/dev/ic/comvar.h:1.78 src/sys/dev/ic/comvar.h:1.78.4.1
--- src/sys/dev/ic/comvar.h:1.78 Thu Oct 3 13:23:03 2013
+++ src/sys/dev/ic/comvar.h Wed Jun 22 08:26:05 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: comvar.h,v 1.78 2013/10/03 13:23:03 kiyohara Exp $ */
+/* $NetBSD: comvar.h,v 1.78.4.1 2016/06/22 08:26:05 snj Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@@ -95,6 +95,12 @@ int com_is_console(bus_space_tag_t, bus_
#ifdef COM_16750
#define COM_REG_USR 31
#endif
+#ifdef COM_AWIN
+#define COM_REG_USR 31
+#define COM_REG_TFL 32
+#define COM_REG_RFL 33
+#define COM_REG_HALT 41
+#endif
struct com_regs {
bus_space_tag_t cr_iot;
@@ -142,6 +148,12 @@ extern const bus_size_t com_std_map[16];
#ifdef COM_16750
#define COM_REG_USR com_usr
#endif
+#ifdef COM_AWIN
+#define COM_REG_USR com_usr
+#define COM_REG_TFL com_tfl
+#define COM_REG_RFL com_rfl
+#define COM_REG_HALT com_halt
+#endif
struct com_regs {
bus_space_tag_t cr_iot;
Index: src/sys/dev/ic/ns16550reg.h
diff -u src/sys/dev/ic/ns16550reg.h:1.10 src/sys/dev/ic/ns16550reg.h:1.10.4.1
--- src/sys/dev/ic/ns16550reg.h:1.10 Thu Oct 3 13:23:03 2013
+++ src/sys/dev/ic/ns16550reg.h Wed Jun 22 08:26:05 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: ns16550reg.h,v 1.10 2013/10/03 13:23:03 kiyohara Exp $ */
+/* $NetBSD: ns16550reg.h,v 1.10.4.1 2016/06/22 08:26:05 snj Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -54,4 +54,9 @@
#ifdef COM_16750
#define com_usr 31 /* status register (R) */
#endif
-
+#ifdef COM_AWIN
+#define com_usr 31 /* status register (R) */
+#define com_tfl 32 /* transmit fifo level (R) */
+#define com_rfl 33 /* receive fifo level (R) */
+#define com_halt 41 /* halt tx (R/W) */
+#endif
