Module Name: src Committed By: scole Date: Fri Aug 5 16:45:50 UTC 2016
Modified Files: src/sys/arch/ia64/disasm: disasm.h disasm_decode.c disasm_extract.c disasm_format.c disasm_int.h Log Message: PR port-ia64/51261 Import later version from FreeBSD To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/ia64/disasm/disasm.h \ src/sys/arch/ia64/disasm/disasm_extract.c cvs rdiff -u -r1.1 -r1.2 src/sys/arch/ia64/disasm/disasm_decode.c \ src/sys/arch/ia64/disasm/disasm_int.h cvs rdiff -u -r1.4 -r1.5 src/sys/arch/ia64/disasm/disasm_format.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/ia64/disasm/disasm.h diff -u src/sys/arch/ia64/disasm/disasm.h:1.2 src/sys/arch/ia64/disasm/disasm.h:1.3 --- src/sys/arch/ia64/disasm/disasm.h:1.2 Thu Apr 3 17:02:34 2014 +++ src/sys/arch/ia64/disasm/disasm.h Fri Aug 5 16:45:50 2016 @@ -1,7 +1,7 @@ -/* $NetBSD: disasm.h,v 1.2 2014/04/03 17:02:34 martin Exp $ */ +/* $NetBSD: disasm.h,v 1.3 2016/08/05 16:45:50 scole Exp $ */ /*- - * Copyright (c) 2000-2003 Marcel Moolenaar + * Copyright (c) 2000-2006 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -25,7 +25,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/ia64/disasm/disasm.h,v 1.3 2005/01/06 22:18:22 imp Exp $ + * $FreeBSD: releng/10.1/sys/ia64/disasm/disasm.h 172689 2007-10-16 02:49:40Z marcel $ */ #ifndef _DISASM_H_ @@ -112,6 +112,7 @@ enum asm_cmpltr_class { ASM_CC_RW, ASM_CC_TREL, ASM_CC_TRUNC, ASM_CC_UNIT, ASM_CC_UNPACK, ASM_CC_UNS, + ASM_CC_VMSW, ASM_CC_XMA }; @@ -205,15 +206,16 @@ enum asm_fmt { ASM_FMT_F1, ASM_FMT_F2, ASM_FMT_F3, ASM_FMT_F4, ASM_FMT_F5, ASM_FMT_F6, ASM_FMT_F7, ASM_FMT_F8, ASM_FMT_F9, ASM_FMT_F10, ASM_FMT_F11, ASM_FMT_F12, - ASM_FMT_F13, ASM_FMT_F14, ASM_FMT_F15, + ASM_FMT_F13, ASM_FMT_F14, ASM_FMT_F15, ASM_FMT_F16, ASM_FMT_I = 0x0400, ASM_FMT_I1, ASM_FMT_I2, ASM_FMT_I3, ASM_FMT_I4, ASM_FMT_I5, ASM_FMT_I6, ASM_FMT_I7, ASM_FMT_I8, ASM_FMT_I9, ASM_FMT_I10, ASM_FMT_I11, ASM_FMT_I12, ASM_FMT_I13, ASM_FMT_I14, ASM_FMT_I15, ASM_FMT_I16, - ASM_FMT_I17, ASM_FMT_I19, ASM_FMT_I20, ASM_FMT_I21, - ASM_FMT_I22, ASM_FMT_I23, ASM_FMT_I24, ASM_FMT_I25, - ASM_FMT_I26, ASM_FMT_I27, ASM_FMT_I28, ASM_FMT_I29, + ASM_FMT_I17, ASM_FMT_I18, ASM_FMT_I19, ASM_FMT_I20, + ASM_FMT_I21, ASM_FMT_I22, ASM_FMT_I23, ASM_FMT_I24, + ASM_FMT_I25, ASM_FMT_I26, ASM_FMT_I27, ASM_FMT_I28, + ASM_FMT_I29, ASM_FMT_I30, ASM_FMT_M = 0x0500, ASM_FMT_M1, ASM_FMT_M2, ASM_FMT_M3, ASM_FMT_M4, ASM_FMT_M5, ASM_FMT_M6, ASM_FMT_M7, ASM_FMT_M8, @@ -226,9 +228,10 @@ enum asm_fmt { ASM_FMT_M33, ASM_FMT_M34, ASM_FMT_M35, ASM_FMT_M36, ASM_FMT_M37, ASM_FMT_M38, ASM_FMT_M39, ASM_FMT_M40, ASM_FMT_M41, ASM_FMT_M42, ASM_FMT_M43, ASM_FMT_M44, - ASM_FMT_M45, ASM_FMT_M46, + ASM_FMT_M45, ASM_FMT_M46, ASM_FMT_M47, ASM_FMT_M48, ASM_FMT_X = 0x0600, - ASM_FMT_X1, ASM_FMT_X2, ASM_FMT_X3, ASM_FMT_X4 + ASM_FMT_X1, ASM_FMT_X2, ASM_FMT_X3, ASM_FMT_X4, + ASM_FMT_X5 }; /* Instruction opcodes. */ @@ -252,6 +255,7 @@ enum asm_op { ASM_OP_FPRSQRTA, ASM_OP_FRCPA, ASM_OP_FRSQRTA, ASM_OP_FSELECT, ASM_OP_FSETC, ASM_OP_FSWAP, ASM_OP_FSXT, ASM_OP_FWB, ASM_OP_FXOR, ASM_OP_GETF, + ASM_OP_HINT, ASM_OP_INVALA, ASM_OP_ITC, ASM_OP_ITR, ASM_OP_LD1, ASM_OP_LD16, ASM_OP_LD2, ASM_OP_LD4, ASM_OP_LD8, ASM_OP_LDF, ASM_OP_LDF8, ASM_OP_LDFD, ASM_OP_LDFE, ASM_OP_LDFP8, @@ -273,9 +277,10 @@ enum asm_op { ASM_OP_ST2, ASM_OP_ST4, ASM_OP_ST8, ASM_OP_STF, ASM_OP_STF8, ASM_OP_STFD, ASM_OP_STFE, ASM_OP_STFS, ASM_OP_SUB, ASM_OP_SUM, ASM_OP_SXT1, ASM_OP_SXT2, ASM_OP_SXT4, ASM_OP_SYNC, - ASM_OP_TAK, ASM_OP_TBIT, ASM_OP_THASH, ASM_OP_TNAT, ASM_OP_TPA, - ASM_OP_TTAG, + ASM_OP_TAK, ASM_OP_TBIT, ASM_OP_TF, ASM_OP_THASH, ASM_OP_TNAT, + ASM_OP_TPA, ASM_OP_TTAG, ASM_OP_UNPACK1, ASM_OP_UNPACK2, ASM_OP_UNPACK4, + ASM_OP_VMSW, ASM_OP_XCHG1, ASM_OP_XCHG2, ASM_OP_XCHG4, ASM_OP_XCHG8, ASM_OP_XMA, ASM_OP_XOR, ASM_OP_ZXT1, ASM_OP_ZXT2, ASM_OP_ZXT4, Index: src/sys/arch/ia64/disasm/disasm_extract.c diff -u src/sys/arch/ia64/disasm/disasm_extract.c:1.2 src/sys/arch/ia64/disasm/disasm_extract.c:1.3 --- src/sys/arch/ia64/disasm/disasm_extract.c:1.2 Sun Jul 17 20:54:42 2011 +++ src/sys/arch/ia64/disasm/disasm_extract.c Fri Aug 5 16:45:50 2016 @@ -1,7 +1,7 @@ -/* $NetBSD: disasm_extract.c,v 1.2 2011/07/17 20:54:42 joerg Exp $ */ +/* $NetBSD: disasm_extract.c,v 1.3 2016/08/05 16:45:50 scole Exp $ */ /*- - * Copyright (c) 2000-2003 Marcel Moolenaar + * Copyright (c) 2000-2006 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -27,7 +27,7 @@ */ #include <sys/cdefs.h> -/* __FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_extract.c,v 1.2 2005/01/06 22:18:22 imp Exp $"); */ +/* __FBSDID("$FreeBSD: releng/10.1/sys/ia64/disasm/disasm_extract.c 159916 2006-06-24 19:21:11Z marcel $"); */ #include <sys/param.h> #include <sys/systm.h> @@ -817,6 +817,26 @@ asm_normalize(struct asm_inst *i, enum a asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_SIG); op = ASM_OP_GETF; break; + case ASM_OP_HINT_B: + asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B); + op = ASM_OP_HINT; + break; + case ASM_OP_HINT_F: + asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F); + op = ASM_OP_HINT; + break; + case ASM_OP_HINT_I: + asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I); + op = ASM_OP_HINT; + break; + case ASM_OP_HINT_M: + asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M); + op = ASM_OP_HINT; + break; + case ASM_OP_HINT_X: + asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X); + op = ASM_OP_HINT; + break; case ASM_OP_INVALA_: asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_NONE); op = ASM_OP_INVALA; @@ -1640,6 +1660,46 @@ asm_normalize(struct asm_inst *i, enum a asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); op = ASM_OP_TBIT; break; + case ASM_OP_TF_NZ_AND: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); + op = ASM_OP_TF; + break; + case ASM_OP_TF_NZ_OR: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); + op = ASM_OP_TF; + break; + case ASM_OP_TF_NZ_OR_ANDCM: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); + op = ASM_OP_TF; + break; + case ASM_OP_TF_Z: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE); + op = ASM_OP_TF; + break; + case ASM_OP_TF_Z_AND: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); + op = ASM_OP_TF; + break; + case ASM_OP_TF_Z_OR: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR); + op = ASM_OP_TF; + break; + case ASM_OP_TF_Z_OR_ANDCM: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM); + op = ASM_OP_TF; + break; + case ASM_OP_TF_Z_UNC: + asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z); + asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC); + op = ASM_OP_TF; + break; case ASM_OP_TNAT_NZ_AND: asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ); asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND); @@ -1704,6 +1764,14 @@ asm_normalize(struct asm_inst *i, enum a asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L); op = ASM_OP_UNPACK4; break; + case ASM_OP_VMSW_0: + asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_0); + op = ASM_OP_VMSW; + break; + case ASM_OP_VMSW_1: + asm_cmpltr_add(i, ASM_CC_VMSW, ASM_CT_1); + op = ASM_OP_VMSW; + break; case ASM_OP_XMA_H: asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_H); op = ASM_OP_XMA; @@ -2058,6 +2126,9 @@ asm_extract(enum asm_op op, enum asm_fmt case ASM_FMT_F15: /* 0 dst */ u_imm(i, 1, bits, 6, 20); break; + case ASM_FMT_F16: /* 0 dst */ + u_imm(i, 1, bits, 6, 20); + break; case ASM_FMT_I1: operand(i, 1, ASM_OPER_GREG, bits, 6, 7); operand(i, 2, ASM_OPER_GREG, bits, 13, 7); @@ -2161,6 +2232,9 @@ asm_extract(enum asm_op op, enum asm_fmt operand(i, 3, ASM_OPER_GREG, bits, 20, 7); i->i_srcidx++; break; + case ASM_FMT_I18: + u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); + break; case ASM_FMT_I19: u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); break; @@ -2218,6 +2292,12 @@ asm_extract(enum asm_op op, enum asm_fmt operand(i, 1, ASM_OPER_GREG, bits, 6, 7); operand(i, 2, ASM_OPER_GREG, bits, 20, 7); break; + case ASM_FMT_I30: /* 2 dst */ + operand(i, 1, ASM_OPER_PREG, bits, 6, 6); + operand(i, 2, ASM_OPER_PREG, bits, 27, 6); + op_imm(i, 3, 32LL + FIELD(bits, 14, 5)); + i->i_srcidx++; + break; case ASM_FMT_M1: asm_hint(i, ASM_CC_LDHINT); operand(i, 1, ASM_OPER_GREG, bits, 6, 7); @@ -2314,8 +2394,7 @@ asm_extract(enum asm_op op, enum asm_fmt s_immf(i, 2, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0); i->i_srcidx--; break; - case ASM_FMT_M16: { - int oper; + case ASM_FMT_M16: asm_hint(i, ASM_CC_LDHINT); operand(i, 1, ASM_OPER_GREG, bits, 6, 7); operand(i, 2, ASM_OPER_MEM, bits, 20, 7); @@ -2323,15 +2402,15 @@ asm_extract(enum asm_op op, enum asm_fmt if (i->i_op == ASM_OP_CMP8XCHG16) { op_type(i, 4, ASM_OPER_AREG); op_value(i, 4, AR_CSD); - oper = 5; - } else - oper = 4; - if (FIELD(bits, 30, 6) < 8) { - op_type(i, oper, ASM_OPER_AREG); - op_value(i, oper, AR_CCV); + op_type(i, 5, ASM_OPER_AREG); + op_value(i, 5, AR_CCV); + } else { + if (FIELD(bits, 30, 6) < 8) { + op_type(i, 4, ASM_OPER_AREG); + op_value(i, 4, AR_CCV); + } } break; - } case ASM_FMT_M17: asm_hint(i, ASM_CC_LDHINT); operand(i, 1, ASM_OPER_GREG, bits, 6, 7); @@ -2478,6 +2557,12 @@ asm_extract(enum asm_op op, enum asm_fmt operand(i, 1, ASM_OPER_GREG, bits, 6, 7); operand(i, 2, ASM_OPER_GREG, bits, 20, 7); break; + case ASM_FMT_M47: + operand(i, 1, ASM_OPER_GREG, bits, 20, 7); + break; + case ASM_FMT_M48: + u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); + break; case ASM_FMT_X1: KASSERT(slot == 2); u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); @@ -2510,6 +2595,11 @@ asm_extract(enum asm_op op, enum asm_fmt i->i_oper[2].o_value <<= 4; i->i_oper[2].o_type = ASM_OPER_DISP; break; + case ASM_FMT_X5: + KASSERT(slot == 2); + u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0); + combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0); + break; default: KASSERT(fmt == ASM_FMT_NONE); return (0); Index: src/sys/arch/ia64/disasm/disasm_decode.c diff -u src/sys/arch/ia64/disasm/disasm_decode.c:1.1 src/sys/arch/ia64/disasm/disasm_decode.c:1.2 --- src/sys/arch/ia64/disasm/disasm_decode.c:1.1 Fri Apr 7 14:21:18 2006 +++ src/sys/arch/ia64/disasm/disasm_decode.c Fri Aug 5 16:45:50 2016 @@ -1,7 +1,7 @@ -/* $NetBSD: disasm_decode.c,v 1.1 2006/04/07 14:21:18 cherry Exp $ */ +/* $NetBSD: disasm_decode.c,v 1.2 2016/08/05 16:45:50 scole Exp $ */ /*- - * Copyright (c) 2000-2003 Marcel Moolenaar + * Copyright (c) 2000-2006 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -27,7 +27,7 @@ */ #include <sys/cdefs.h> -/* __FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_decode.c,v 1.3 2005/01/06 22:18:22 imp Exp $"); */ +/* __FBSDID("$FreeBSD: releng/10.1/sys/ia64/disasm/disasm_decode.c 159916 2006-06-24 19:21:11Z marcel $"); */ #include <sys/param.h> #include <sys/systm.h> @@ -569,6 +569,12 @@ asm_decodeB(uint64_t ip, struct asm_bund case 0x10: op = ASM_OP_EPC, fmt = ASM_FMT_B8; break; + case 0x18: + op = ASM_OP_VMSW_0, fmt = ASM_FMT_B8; + break; + case 0x19: + op = ASM_OP_VMSW_1, fmt = ASM_FMT_B8; + break; case 0x20: switch (FIELD(bits, 6, 3)) { /* btype */ case 0x0: @@ -593,6 +599,9 @@ asm_decodeB(uint64_t ip, struct asm_bund case 0x0: op = ASM_OP_NOP_B, fmt = ASM_FMT_B9; break; + case 0x1: + op = ASM_OP_HINT_B, fmt = ASM_FMT_B9; + break; case 0x10: op = ASM_OP_BRP_, fmt = ASM_FMT_B7; break; @@ -657,7 +666,10 @@ asm_decodeF(uint64_t ip, struct asm_bund op = ASM_OP_BREAK_F, fmt = ASM_FMT_F15; break; case 0x1: - op = ASM_OP_NOP_F, fmt = ASM_FMT_F15; + if (FIELD(bits, 26, 1) == 0) /* y */ + op = ASM_OP_NOP_F, fmt = ASM_FMT_F16; + else + op = ASM_OP_HINT_F, fmt = ASM_FMT_F16; break; case 0x4: op = ASM_OP_FSETC, fmt = ASM_FMT_F12; @@ -908,7 +920,10 @@ asm_decodeI(uint64_t ip, struct asm_bund op = ASM_OP_BREAK_I, fmt = ASM_FMT_I19; break; case 0x1: - op = ASM_OP_NOP_I, fmt = ASM_FMT_I19; + if (FIELD(bits, 26, 1) == 0) /* y */ + op = ASM_OP_NOP_I, fmt = ASM_FMT_I18; + else + op = ASM_OP_HINT_I, fmt = ASM_FMT_I18; break; case 0xA: op = ASM_OP_MOV_I, fmt = ASM_FMT_I27; @@ -993,11 +1008,20 @@ asm_decodeI(uint64_t ip, struct asm_bund fmt = ASM_FMT_I16; break; case 0x2: - op = ASM_OP_TNAT_Z, fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_Z, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_Z, + fmt = ASM_FMT_I30; break; case 0x3: - op = ASM_OP_TNAT_Z_UNC, - fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_Z_UNC, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_Z_UNC, + fmt = ASM_FMT_I30; break; } } else { @@ -1011,12 +1035,20 @@ asm_decodeI(uint64_t ip, struct asm_bund fmt = ASM_FMT_I16; break; case 0x2: - op = ASM_OP_TNAT_Z_AND, - fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_Z_AND, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_Z_AND, + fmt = ASM_FMT_I30; break; case 0x3: - op = ASM_OP_TNAT_NZ_AND, - fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_NZ_AND, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_NZ_AND, + fmt = ASM_FMT_I30; break; } } @@ -1033,12 +1065,20 @@ asm_decodeI(uint64_t ip, struct asm_bund fmt = ASM_FMT_I16; break; case 0x2: - op = ASM_OP_TNAT_Z_OR, - fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_Z_OR, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_Z_OR, + fmt = ASM_FMT_I30; break; case 0x3: - op = ASM_OP_TNAT_NZ_OR, - fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_NZ_OR, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_NZ_OR, + fmt = ASM_FMT_I30; break; } } else { @@ -1052,12 +1092,20 @@ asm_decodeI(uint64_t ip, struct asm_bund fmt = ASM_FMT_I16; break; case 0x2: - op = ASM_OP_TNAT_Z_OR_ANDCM, - fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_Z_OR_ANDCM, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_Z_OR_ANDCM, + fmt = ASM_FMT_I30; break; case 0x3: - op = ASM_OP_TNAT_NZ_OR_ANDCM, - fmt = ASM_FMT_I17; + if (FIELD(bits, 19, 1) == 0) /* x */ + op = ASM_OP_TNAT_NZ_OR_ANDCM, + fmt = ASM_FMT_I17; + else + op = ASM_OP_TF_NZ_OR_ANDCM, + fmt = ASM_FMT_I30; break; } } @@ -1284,7 +1332,10 @@ asm_decodeM(uint64_t ip, struct asm_bund op = ASM_OP_BREAK_M, fmt = ASM_FMT_M37; break; case 0x1: - op = ASM_OP_NOP_M, fmt = ASM_FMT_M37; + if (FIELD(bits, 26, 1) == 0) /* y */ + op = ASM_OP_NOP_M, fmt = ASM_FMT_M48; + else + op = ASM_OP_HINT_M, fmt = ASM_FMT_M48; break; case 0x4: case 0x14: case 0x24: case 0x34: op = ASM_OP_SUM, fmt = ASM_FMT_M44; @@ -1484,7 +1535,7 @@ asm_decodeM(uint64_t ip, struct asm_bund op = ASM_OP_PROBE_W_FAULT, fmt = ASM_FMT_M40; break; case 0x34: - op = ASM_OP_PTC_E, fmt = ASM_FMT_M28; + op = ASM_OP_PTC_E, fmt = ASM_FMT_M47; break; case 0x38: op = ASM_OP_PROBE_R, fmt = ASM_FMT_M38; @@ -2441,7 +2492,10 @@ asm_decodeX(uint64_t ip, struct asm_bund op = ASM_OP_BREAK_X, fmt = ASM_FMT_X1; break; case 0x1: - op = ASM_OP_NOP_X, fmt = ASM_FMT_X1; + if (FIELD(bits, 26, 1) == 0) /* y */ + op = ASM_OP_NOP_X, fmt = ASM_FMT_X5; + else + op = ASM_OP_HINT_X, fmt = ASM_FMT_X5; break; } } Index: src/sys/arch/ia64/disasm/disasm_int.h diff -u src/sys/arch/ia64/disasm/disasm_int.h:1.1 src/sys/arch/ia64/disasm/disasm_int.h:1.2 --- src/sys/arch/ia64/disasm/disasm_int.h:1.1 Fri Apr 7 14:21:18 2006 +++ src/sys/arch/ia64/disasm/disasm_int.h Fri Aug 5 16:45:50 2016 @@ -1,7 +1,7 @@ -/* $NetBSD: disasm_int.h,v 1.1 2006/04/07 14:21:18 cherry Exp $ */ +/* $NetBSD: disasm_int.h,v 1.2 2016/08/05 16:45:50 scole Exp $ */ /*- - * Copyright (c) 2000-2003 Marcel Moolenaar + * Copyright (c) 2000-2006 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -25,7 +25,7 @@ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * - * $FreeBSD: src/sys/ia64/disasm/disasm_int.h,v 1.2 2005/01/06 22:18:22 imp Exp $ + * $FreeBSD: releng/10.1/sys/ia64/disasm/disasm_int.h 159916 2006-06-24 19:21:11Z marcel $ */ #ifndef _DISASM_INT_H_ @@ -124,6 +124,8 @@ ASM_OP_FSWAP_, ASM_OP_FSWAP_NL, ASM_OP_FSWAP_NR, \ ASM_OP_FSXT_L, ASM_OP_FSXT_R, \ ASM_OP_GETF_D, ASM_OP_GETF_EXP, ASM_OP_GETF_S, ASM_OP_GETF_SIG, \ + ASM_OP_HINT_B, ASM_OP_HINT_F, ASM_OP_HINT_I, ASM_OP_HINT_M, \ + ASM_OP_HINT_X, \ ASM_OP_INVALA_, ASM_OP_INVALA_E, \ ASM_OP_ITC_D, ASM_OP_ITC_I, \ ASM_OP_ITR_D, ASM_OP_ITR_I, \ @@ -206,12 +208,16 @@ ASM_OP_TBIT_NZ_AND, ASM_OP_TBIT_NZ_OR, ASM_OP_TBIT_NZ_OR_ANDCM, \ ASM_OP_TBIT_Z, ASM_OP_TBIT_Z_AND, ASM_OP_TBIT_Z_OR, \ ASM_OP_TBIT_Z_OR_ANDCM, ASM_OP_TBIT_Z_UNC, \ + ASM_OP_TF_NZ_AND, ASM_OP_TF_NZ_OR, ASM_OP_TF_NZ_OR_ANDCM, \ + ASM_OP_TF_Z, ASM_OP_TF_Z_AND, ASM_OP_TF_Z_OR, \ + ASM_OP_TF_Z_OR_ANDCM, ASM_OP_TF_Z_UNC, \ ASM_OP_TNAT_NZ_AND, ASM_OP_TNAT_NZ_OR, ASM_OP_TNAT_NZ_OR_ANDCM, \ ASM_OP_TNAT_Z, ASM_OP_TNAT_Z_AND, ASM_OP_TNAT_Z_OR, \ ASM_OP_TNAT_Z_OR_ANDCM, ASM_OP_TNAT_Z_UNC, \ ASM_OP_UNPACK1_H, ASM_OP_UNPACK1_L, \ ASM_OP_UNPACK2_H, ASM_OP_UNPACK2_L, \ ASM_OP_UNPACK4_H, ASM_OP_UNPACK4_L, \ + ASM_OP_VMSW_0, ASM_OP_VMSW_1, \ ASM_OP_XMA_H, ASM_OP_XMA_HU, ASM_OP_XMA_L, \ ASM_OP_NUMBER_OF_OPCODES Index: src/sys/arch/ia64/disasm/disasm_format.c diff -u src/sys/arch/ia64/disasm/disasm_format.c:1.4 src/sys/arch/ia64/disasm/disasm_format.c:1.5 --- src/sys/arch/ia64/disasm/disasm_format.c:1.4 Thu Apr 3 17:02:34 2014 +++ src/sys/arch/ia64/disasm/disasm_format.c Fri Aug 5 16:45:50 2016 @@ -1,7 +1,7 @@ -/* $NetBSD: disasm_format.c,v 1.4 2014/04/03 17:02:34 martin Exp $ */ +/* $NetBSD: disasm_format.c,v 1.5 2016/08/05 16:45:50 scole Exp $ */ /*- - * Copyright (c) 2000-2003 Marcel Moolenaar + * Copyright (c) 2000-2006 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -29,7 +29,7 @@ #include "opt_ddb.h" #include <sys/cdefs.h> -/* __FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_format.c,v 1.2 2005/01/06 22:18:22 imp Exp $"); */ +/* __FBSDID("$FreeBSD: releng/10.1/sys/ia64/disasm/disasm_format.c 159916 2006-06-24 19:21:11Z marcel $"); */ #include <sys/param.h> #include <sys/systm.h> @@ -57,6 +57,7 @@ static const char *asm_mnemonics[] = { "fpms", "fpnma", "fprcpa", "fprsqrta", "frcpa", "frsqrta", "fselect", "fsetc", "fswap", "fsxt", "fwb", "fxor", "getf", + "hint", "invala", "itc", "itr", "ld1", "ld16", "ld2", "ld4", "ld8", "ldf", "ldf8", "ldfd", "ldfe", "ldfp8", "ldfpd", "ldfps", "ldfs", "lfetch", "loadrs", @@ -72,8 +73,9 @@ static const char *asm_mnemonics[] = { "setf", "shl", "shladd", "shladdp4", "shr", "shrp", "srlz", "ssm", "st1", "st16", "st2", "st4", "st8", "stf", "stf8", "stfd", "stfe", "stfs", "sub", "sum", "sxt1", "sxt2", "sxt4", "sync", - "tak", "tbit", "thash", "tnat", "tpa", "ttag", + "tak", "tbit", "tf", "thash", "tnat", "tpa", "ttag", "unpack1", "unpack2", "unpack4", + "vmsw", "xchg1", "xchg2", "xchg4", "xchg8", "xma", "xor", "zxt1", "zxt2", "zxt4" };