Module Name: src
Committed By: christos
Date: Tue Aug 23 10:00:15 UTC 2016
Modified Files:
src/lib/libm: Makefile
Added Files:
src/lib/libm/arch/alpha: fenv.c
Log Message:
fenv.h for alpha
To generate a diff of this commit:
cvs rdiff -u -r1.177 -r1.178 src/lib/libm/Makefile
cvs rdiff -u -r0 -r1.1 src/lib/libm/arch/alpha/fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/lib/libm/Makefile
diff -u src/lib/libm/Makefile:1.177 src/lib/libm/Makefile:1.178
--- src/lib/libm/Makefile:1.177 Wed Mar 30 03:44:06 2016
+++ src/lib/libm/Makefile Tue Aug 23 06:00:15 2016
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.177 2016/03/30 07:44:06 martin Exp $
+# $NetBSD: Makefile,v 1.178 2016/08/23 10:00:15 christos Exp $
#
# @(#)Makefile 5.1beta 93/09/24
#
@@ -64,6 +64,7 @@ COMMON_SRCS+= s_fma.c s_fmaf.c s_fmal.c
.elif (${LIBC_MACHINE_ARCH} == "alpha")
.PATH: ${.CURDIR}/arch/alpha
ARCH_SRCS = s_copysign.S s_copysignf.S lrint.S
+COMMON_SRCS+= fenv.c
COPTS+= -mfloat-ieee -mieee-with-inexact -mfp-trap-mode=sui -mtrap-precision=i
.elif (${LIBC_MACHINE_CPU} == "arm")
.PATH.c: ${.CURDIR}/arch/arm
Added files:
Index: src/lib/libm/arch/alpha/fenv.c
diff -u /dev/null src/lib/libm/arch/alpha/fenv.c:1.1
--- /dev/null Tue Aug 23 06:00:15 2016
+++ src/lib/libm/arch/alpha/fenv.c Tue Aug 23 06:00:15 2016
@@ -0,0 +1,150 @@
+/* $NetBSD: fenv.c,v 1.1 2016/08/23 10:00:15 christos Exp $ */
+
+/*-
+ * Copyright (c) 2004-2005 David Schultz <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/lib/msun/alpha/fenv.c,v 1.2 2005/03/16 19:03:44 das Exp $
+ */
+#include <sys/cdefs.h>
+__RCSID("$NetBSD: fenv.c,v 1.1 2016/08/23 10:00:15 christos Exp $");
+
+#ifdef __weak_alias
+#define feenableexcept _feenableexcept
+#define fedisableexcept _fedisableexcept
+#define fegetexcept _fegetexcept
+#endif
+#include <machine/sysarch.h>
+#include <fenv.h>
+
+const fenv_t __fe_dfl_env = 0x680e000000000000ULL;
+
+/*
+ * The lower 49 bits of the FPCR are unused by the hardware, so we use
+ * the lower order bits to store the kernel's idea of the FP mask as
+ * described in the Alpha Architecture Manual.
+ */
+int
+fegetenv(fenv_t *envp)
+{
+ struct alpha_fp_except_args p;
+ union __fpcr r;
+
+ /*
+ * The syscall acts as an implicit exception barrier, so we
+ * only need to issue an excb after the mf_fpcr to ensure that
+ * the read is executed before any subsequent FP ops.
+ */
+ sysarch(ALPHA_FPGETMASK, (char *)&p);
+ __mf_fpcr(&r.__d);
+ *envp = r.__bits | p.mask;
+ __excb();
+ return 0;
+}
+
+int
+feholdexcept(fenv_t *envp)
+{
+ struct alpha_fp_except_args p;
+ union __fpcr r;
+
+ sysarch(ALPHA_FPGETMASK, (char *)&p);
+ __mf_fpcr(&r.__d);
+ *envp = r.__bits | p.mask;
+ r.__bits &= ~((fenv_t)FE_ALL_EXCEPT << _FPUSW_SHIFT);
+ __mt_fpcr(r.__d);
+ if (p.mask & FE_ALL_EXCEPT) {
+ p.mask = 0;
+ sysarch(ALPHA_FPSETMASK, &p);
+ }
+ __excb();
+ return 0;
+}
+
+int
+fesetenv(const fenv_t *envp)
+{
+ struct alpha_fp_except_args p;
+ union __fpcr r;
+
+ p.mask = *envp & FE_ALL_EXCEPT;
+ sysarch(ALPHA_FPSETMASK, &p);
+ r.__bits = *envp & ~FE_ALL_EXCEPT;
+ __mt_fpcr(r.__d);
+ __excb();
+ return 0;
+}
+
+int
+feupdateenv(const fenv_t *envp)
+{
+ struct alpha_fp_except_args p;
+ union __fpcr oldr, newr;
+
+ p.mask = *envp & FE_ALL_EXCEPT;
+ sysarch(ALPHA_FPSETMASK, &p);
+ __mf_fpcr(&oldr.__d);
+ newr.__bits = *envp & ~FE_ALL_EXCEPT;
+ __excb();
+ __mt_fpcr(newr.__d);
+ feraiseexcept((oldr.__bits >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
+ return 0;
+}
+
+#ifdef __weak_alias
+__weak_alias(feenableexcept, _feenableexcept);
+__weak_alias(fedisableexcept, _fedisableexcept);
+__weak_alias(fegetexcept, _fegetexcept);
+#endif
+
+int
+feenableexcept(int mask)
+{
+ struct alpha_fp_except_args p;
+
+ sysarch(ALPHA_FPGETMASK, &p);
+ p.mask |= (mask & FE_ALL_EXCEPT);
+ sysarch(ALPHA_FPSETMASK, &p);
+ return p.mask;
+}
+
+int
+fedisableexcept(int mask)
+{
+ struct alpha_fp_except_args p;
+
+ sysarch(ALPHA_FPGETMASK, &p);
+ p.mask &= ~(mask & FE_ALL_EXCEPT);
+ sysarch(ALPHA_FPSETMASK, &p);
+ return p.mask;
+}
+
+int
+fegetexcept(void)
+{
+ struct alpha_fp_except_args p;
+
+ sysarch(ALPHA_FPGETMASK, &p);
+ return p.mask;
+}
