Module Name: src
Committed By: kiyohara
Date: Tue Oct 4 16:03:39 UTC 2016
Modified Files:
src/sys/arch/arm/omap: omap2_reg.h sitara_cm.c sitara_cmreg.h
Log Message:
Print am335x ID and fetures. Also add omap_{chip,dev}id().
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/omap/omap2_reg.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/omap/sitara_cm.c \
src/sys/arch/arm/omap/sitara_cmreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/omap/omap2_reg.h
diff -u src/sys/arch/arm/omap/omap2_reg.h:1.33 src/sys/arch/arm/omap/omap2_reg.h:1.34
--- src/sys/arch/arm/omap/omap2_reg.h:1.33 Mon Jul 11 14:51:11 2016
+++ src/sys/arch/arm/omap/omap2_reg.h Tue Oct 4 16:03:39 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: omap2_reg.h,v 1.33 2016/07/11 14:51:11 kiyohara Exp $ */
+/* $NetBSD: omap2_reg.h,v 1.34 2016/10/04 16:03:39 kiyohara Exp $ */
/*
* Copyright (c) 2007 Microsoft
@@ -163,6 +163,18 @@
#define DEVID_AMDM37X_ES11 0x1b89102f
#define DEVID_AMDM37X_ES12 0x2b89102f
+#define CHIPID_AM3351 0x00fc0302
+#define CHIPID_AM3352 0x00fc0382
+#define CHIPID_AM3354 0x20fc0382
+#define CHIPID_AM3356 0x00fd0383
+#define CHIPID_AM3357 0x00ff0383
+#define CHIPID_AM3358 0x20fd0383
+#define CHIPID_AM3359 0x20ff0383
+
+#define DEVID_AM335X_SR_10 0x0b94402e
+#define DEVID_AM335X_SR_20 0x1b94402e
+#define DEVID_AM335X_SR_21 0x2b94402e
+
/*
* Clock Management registers base, offsets, and size
*/
Index: src/sys/arch/arm/omap/sitara_cm.c
diff -u src/sys/arch/arm/omap/sitara_cm.c:1.2 src/sys/arch/arm/omap/sitara_cm.c:1.3
--- src/sys/arch/arm/omap/sitara_cm.c:1.2 Sat Oct 18 08:33:24 2014
+++ src/sys/arch/arm/omap/sitara_cm.c Tue Oct 4 16:03:39 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: sitara_cm.c,v 1.2 2014/10/18 08:33:24 snj Exp $ */
+/* $NetBSD: sitara_cm.c,v 1.3 2016/10/04 16:03:39 kiyohara Exp $ */
/*
* Copyright (c) 2010
* Ben Gray <ben.r.g...@gmail.com>.
@@ -47,7 +47,7 @@
*
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sitara_cm.c,v 1.2 2014/10/18 08:33:24 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sitara_cm.c,v 1.3 2016/10/04 16:03:39 kiyohara Exp $");
#include "opt_omap.h"
@@ -60,13 +60,17 @@ __KERNEL_RCSID(0, "$NetBSD: sitara_cm.c,
#include <sys/kernel.h>
#include <arm/omap/omap2_obiovar.h>
+#include <arm/omap/omap2_reg.h>
#include <arm/omap/sitara_cm.h>
#include <arm/omap/sitara_cmreg.h>
struct sitara_cm_softc {
- device_t sc_dev;
- bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh;
+ device_t sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+
+ uint32_t sc_cid; /* Chip Identification */
+ uint32_t sc_did; /* Device IDCODE */
};
@@ -391,6 +395,15 @@ sitara_cm_attach(device_t parent, device
struct sitara_cm_softc *sc = device_private(self);
struct obio_attach_args *obio = opaque;
uint32_t rev;
+ char cid, buf[256];
+ const char *did;
+ const char *fmt = "\177\020"
+ "b\0ICSS\0"
+ "b\1CPSW\0"
+ "b\7DCAN\0"
+ "f\16\1ICSS_FEA EtherCAT functionality\0=\0disabled\0=\1enabled\0"
+ "f\17\1ICSS_FEA TX_AUTO_SEQUENCE\0=\0disabled\0=\1enabled\0"
+ "b\29SGX\0";
aprint_naive("\n");
@@ -412,4 +425,60 @@ sitara_cm_attach(device_t parent, device
panic("sitara_cm_attach: read revision");
aprint_normal(": control module, rev %d.%d\n",
SCM_REVISION_MAJOR(rev), SCM_REVISION_MINOR(rev));
+
+ sitara_cm_reg_read_4(OMAP2SCM_DEVID, &sc->sc_did);
+ sitara_cm_reg_read_4(OMAP2SCM_DEV_FEATURE, &sc->sc_cid);
+ switch (sc->sc_cid) {
+ case CHIPID_AM3351: cid = '1'; break;
+ case CHIPID_AM3352: cid = '2'; break;
+ case CHIPID_AM3354: cid = '4'; break;
+ case CHIPID_AM3356: cid = '6'; break;
+ case CHIPID_AM3357: cid = '7'; break;
+ case CHIPID_AM3358: cid = '8'; break;
+ case CHIPID_AM3359: cid = '9'; break;
+ default:
+ aprint_normal_dev(self, "unknwon ChipID found 0x%08x\n",
+ sc->sc_cid);
+ cid = 'x';
+ break;
+ }
+ aprint_normal_dev(self, "AM335%c", cid);
+ switch (sc->sc_did) {
+ case DEVID_AM335X_SR_10: did = "1.0"; break;
+ case DEVID_AM335X_SR_20: did = "2.0"; break;
+ case DEVID_AM335X_SR_21: did = "2.1"; break;
+ default:
+ aprint_normal_dev(self, "unknwon DeviceID found 0x%08x\n",
+ sc->sc_did);
+ did = NULL;
+ break;
+ }
+ if (did != NULL)
+ aprint_normal(" Silicon Revision %s", did);
+ snprintb(buf, sizeof(buf), fmt, sc->sc_cid);
+ aprint_normal(": %s\n", buf);
+}
+
+uint32_t
+omap_chipid(void)
+{
+ struct sitara_cm_softc *sc;
+ device_t dev;
+
+ dev = device_find_by_xname("sitaracm0");
+ KASSERT(dev != NULL);
+ sc = device_private(dev);
+ return sc->sc_cid;
+}
+
+uint32_t
+omap_devid(void)
+{
+ struct sitara_cm_softc *sc;
+ device_t dev;
+
+ dev = device_find_by_xname("sitaracm0");
+ KASSERT(dev != NULL);
+ sc = device_private(dev);
+ return sc->sc_did;
}
Index: src/sys/arch/arm/omap/sitara_cmreg.h
diff -u src/sys/arch/arm/omap/sitara_cmreg.h:1.2 src/sys/arch/arm/omap/sitara_cmreg.h:1.3
--- src/sys/arch/arm/omap/sitara_cmreg.h:1.2 Wed Jul 16 18:25:24 2014
+++ src/sys/arch/arm/omap/sitara_cmreg.h Tue Oct 4 16:03:39 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: sitara_cmreg.h,v 1.2 2014/07/16 18:25:24 bouyer Exp $ */
+/* $NetBSD: sitara_cmreg.h,v 1.3 2016/10/04 16:03:39 kiyohara Exp $ */
/*
* Copyright (c) 2013 Manuel Bouyer. All rights reserved.
@@ -39,6 +39,9 @@
#define SCM_REVISION_CUSTOM(x) (((x) & 0x000000c0) >> 6)
#define SCM_REVISION_MINOR(x) (((x) & 0x0000001f) >> 0)
+#define OMAP2SCM_DEVID 0x600
+#define OMAP2SCM_DEV_FEATURE 0x604
+
#define OMAP2SCM_USB_CTL0 0x620
#define OMAP2SCM_USB_CTL1 0x628
#define OMAP2SCM_USB_CTLx_SESSIONEND 0x100000
