Module Name: src
Committed By: hkenken
Date: Thu Nov 24 03:59:36 UTC 2016
Modified Files:
src/sys/arch/arm/imx: if_enet_imx6.c imx6_ahcisata.c imx6_ccm.c
imx6_ccmreg.h imx6_ccmvar.h
src/sys/arch/evbarm/nitrogen6: nitrogen6_usb.c
Log Message:
Modified imx6_pll_power() arguments.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/if_enet_imx6.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx6_ahcisata.c \
src/sys/arch/arm/imx/imx6_ccmreg.h src/sys/arch/arm/imx/imx6_ccmvar.h
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx6_ccm.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/imx/if_enet_imx6.c
diff -u src/sys/arch/arm/imx/if_enet_imx6.c:1.1 src/sys/arch/arm/imx/if_enet_imx6.c:1.2
--- src/sys/arch/arm/imx/if_enet_imx6.c:1.1 Tue May 17 06:44:45 2016
+++ src/sys/arch/arm/imx/if_enet_imx6.c Thu Nov 24 03:59:36 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: if_enet_imx6.c,v 1.1 2016/05/17 06:44:45 ryo Exp $ */
+/* $NetBSD: if_enet_imx6.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_enet_imx6.c,v 1.1 2016/05/17 06:44:45 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_enet_imx6.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $");
#include "locators.h"
#include "imxccm.h"
@@ -93,7 +93,8 @@ enet_attach(device_t parent, device_t se
#if NIMXCCM > 0
/* PLL power up */
- if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1) != 0) {
+ if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1,
+ CCM_ANALOG_PLL_ENET_ENABLE) != 0) {
aprint_error_dev(sc->sc_dev,
"couldn't enable CCM_ANALOG_PLL_ENET\n");
return;
Index: src/sys/arch/arm/imx/imx6_ahcisata.c
diff -u src/sys/arch/arm/imx/imx6_ahcisata.c:1.3 src/sys/arch/arm/imx/imx6_ahcisata.c:1.4
--- src/sys/arch/arm/imx/imx6_ahcisata.c:1.3 Thu Feb 25 13:27:33 2016
+++ src/sys/arch/arm/imx/imx6_ahcisata.c Thu Nov 24 03:59:36 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ahcisata.c,v 1.3 2016/02/25 13:27:33 ryo Exp $ */
+/* $NetBSD: imx6_ahcisata.c,v 1.4 2016/11/24 03:59:36 hkenken Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.3 2016/02/25 13:27:33 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.4 2016/11/24 03:59:36 hkenken Exp $");
#include "locators.h"
#include "opt_imx.h"
@@ -266,7 +266,8 @@ ixm6_ahcisata_init(struct imx_ahci_softc
imx6_ccm_write(CCM_CCGR5, v | CCM_CCGR5_100M_CLK_ENABLE(3));
/* PLL power up */
- if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1) != 0) {
+ if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1,
+ CCM_ANALOG_PLL_ENET_ENABLE_100M) != 0) {
aprint_error_dev(sc->sc_dev,
"couldn't enable CCM_ANALOG_PLL_ENET\n");
return -1;
Index: src/sys/arch/arm/imx/imx6_ccmreg.h
diff -u src/sys/arch/arm/imx/imx6_ccmreg.h:1.3 src/sys/arch/arm/imx/imx6_ccmreg.h:1.4
--- src/sys/arch/arm/imx/imx6_ccmreg.h:1.3 Fri Jan 9 09:50:46 2015
+++ src/sys/arch/arm/imx/imx6_ccmreg.h Thu Nov 24 03:59:36 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccmreg.h,v 1.3 2015/01/09 09:50:46 ryo Exp $ */
+/* $NetBSD: imx6_ccmreg.h,v 1.4 2016/11/24 03:59:36 hkenken Exp $ */
/*
* Copyright (c) 2014 Ryo Shimizu <r...@nerv.org>
@@ -79,7 +79,7 @@
#define CCM_CBCMR_VPU_AXI_CLK_SEL __BITS(15, 14)
#define CCM_CBCMR_PERIPH_CLK2_SEL __BITS(13, 12)
#define CCM_CBCMR_VDOAXI_CLK_SEL __BIT(11)
-#define CCM_CBCMR_PCIE_AXI_CLK_SE __BIT(10)
+#define CCM_CBCMR_PCIE_AXI_CLK_SEL __BIT(10)
#define CCM_CBCMR_GPU3D_SHADER_CLK_SEL __BITS(9, 8)
#define CCM_CBCMR_GPU3D_CORE_CLK_SEL __BITS(5, 4)
#define CCM_CBCMR_GPU3D_AXI_CLK_SEL __BIT(1)
@@ -140,6 +140,37 @@
#define CCM_CSCDR3_IPU1_HSP_PODF __BITS(13, 11)
#define CCM_CSCDR3_IPU1_HSP_CLK_SEL __BITS(10, 9)
+#define CCM_CCGR2 0x00000070
+#define CCM_CCGR2_IPSYNC_VDOA_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(27, 26))
+#define CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(25, 24))
+#define CCM_CCGR2_IPSYNC_IP2APB_TZASC1_IPG_CLK_ENABLE(n) __SHIFTIN(n, __BITS(23, 22))
+#define CCM_CCGR2_IPMUX3_CLK_ENABLE(n) __SHIFTIN(n, __BITS(21, 20))
+#define CCM_CCGR2_IPMUX2_CLK_ENABLE(n) __SHIFTIN(n, __BITS(19, 18))
+#define CCM_CCGR2_IPMUX1_CLK_ENABLE(n) __SHIFTIN(n, __BITS(17, 16))
+#define CCM_CCGR2_IOMUX_IPT_CLK_IO_CLK_ENABLE(n) __SHIFTIN(n, __BITS(15, 14))
+#define CCM_CCGR2_IIM_CLK_ENABLE(n) __SHIFTIN(n, __BITS(13, 12))
+#define CCM_CCGR2_I2C3_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(11, 10))
+#define CCM_CCGR2_I2C2_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(9, 8))
+#define CCM_CCGR2_I2C1_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(7, 6))
+#define CCM_CCGR2_HDMI_TX_ISFRCLK_ENABLE(n) __SHIFTIN(n, __BITS(5, 4))
+#define CCM_CCGR2_HDMI_TX_IAHBCLK_ENABLE(n) __SHIFTIN(n, __BITS(1, 0))
+#define CCM_CCGR4 0x00000078
+#define CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_CLK_ENABLE(N) __SHIFTIN(n, __BITS(31, 30))
+#define CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_CLK_ENABLE(n) __SHIFTIN(n, __BITS(29, 28))
+#define CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_CLK_ENABLE(n) __SHIFTIN(n, __BITS(27, 26))
+#define CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_CLK_ENABLE(n) __SHIFTIN(n, __BITS(25, 24))
+#define CCM_CCGR4_PWM4_CLK_ENABLE(n) __SHIFTIN(n, __BITS(23, 22))
+#define CCM_CCGR4_PWM3_CLK_ENABLE(n) __SHIFTIN(n, __BITS(21, 20))
+#define CCM_CCGR4_PWM2_CLK_ENABLE(n) __SHIFTIN(n, __BITS(19, 18))
+#define CCM_CCGR4_PWM1_CLK_ENABLE(n) __SHIFTIN(n, __BITS(17, 16))
+#define CCM_CCGR4_PL301_MX6QPER2_MAINCLK_ENABLE(n) __SHIFTIN(n, __BITS(15, 14))
+#define CCM_CCGR4_PL301_MX6QPER1_BCHCLK_ENABLE(n) __SHIFTIN(n, __BITS(13, 12))
+#define CCM_CCGR4_CG5_ENABLE(n) __SHIFTIN(n, __BITS(11, 10))
+#define CCM_CCGR4_PL301_MX6QFAST1_S133CLK_ENABLE(n) __SHIFTIN(n, __BITS(9, 8))
+#define CCM_CCGR4_CG3_ENABLE(n) __SHIFTIN(n, __BITS(7, 6))
+#define CCM_CCGR4_CG2_ENABLE(n) __SHIFTIN(n, __BITS(5, 4))
+#define CCM_CCGR4_CG1_ENABLE(n) __SHIFTIN(n, __BITS(3, 2))
+#define CCM_CCGR4_125M_ROOT_ENABLE(n) __SHIFTIN(n, __BITS(1, 0))
#define CCM_CCGR5 0x0000007c
#define CCM_CCGR5_UART_SERIAL_CLK_ENABLE(n) __SHIFTIN(n, __BITS(27, 26))
#define CCM_CCGR5_UART_CLK_ENABLE(n) __SHIFTIN(n, __BITS(25, 24))
@@ -186,6 +217,7 @@
#define CCM_ANALOG_PLL_SYS_SET 0x00004034
#define CCM_ANALOG_PLL_SYS_CLR 0x00004038
#define CCM_ANALOG_PLL_SYS_TOG 0x0000403c
+#define CCM_ANALOG_PLL_SYS_ENABLE __BIT(13)
#define CCM_ANALOG_PLL_SYS_DIV_SELECT __BIT(0)
#define CCM_ANALOG_PLL_SYS_SS 0x00004040
#define CCM_ANALOG_PLL_SYS_NUM 0x00004050
@@ -256,7 +288,18 @@
#define CCM_ANALOG_MISC0 0x00004150
#define CCM_ANALOG_MISC0_SET 0x00004154
#define CCM_ANALOG_MISC0_CLR 0x00004158
-#define CCM_ANALOG_MISC0_TOG 0x0000415C
+#define CCM_ANALOG_MISC0_TOG 0x0000415c
+#define CCM_ANALOG_MISC1 0x00004160
+#define CCM_ANALOG_MISC1_SET 0x00004164
+#define CCM_ANALOG_MISC1_CLR 0x00004168
+#define CCM_ANALOG_MISC1_TOG 0x0000416c
+#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC __BITS(4, 0)
+#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC_PCIE __SHIFTIN(0xa, CCM_ANALOG_MISC1_LVDS_CLK1_SRC)
+#define CCM_ANALOG_MISC1_LVDS_CLK1_SRC_SATA __SHIFTIN(0xb, CCM_ANALOG_MISC1_LVDS_CLK1_SRC)
+#define CCM_ANALOG_MISC1_LVDS_CLK1_OBEN __BIT(10)
+#define CCM_ANALOG_MISC1_LVDS_CLK2_OBEN __BIT(11)
+#define CCM_ANALOG_MISC1_LVDS_CLK1_IBEN __BIT(12)
+#define CCM_ANALOG_MISC1_LVDS_CLK2_IBEN __BIT(13)
#define CCM_ANALOG_MISC2 0x00004170
#define CCM_ANALOG_MISC2_SET 0x00004174
#define CCM_ANALOG_MISC2_CLR 0x00004178
Index: src/sys/arch/arm/imx/imx6_ccmvar.h
diff -u src/sys/arch/arm/imx/imx6_ccmvar.h:1.3 src/sys/arch/arm/imx/imx6_ccmvar.h:1.4
--- src/sys/arch/arm/imx/imx6_ccmvar.h:1.3 Fri Jan 9 09:50:46 2015
+++ src/sys/arch/arm/imx/imx6_ccmvar.h Thu Nov 24 03:59:36 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccmvar.h,v 1.3 2015/01/09 09:50:46 ryo Exp $ */
+/* $NetBSD: imx6_ccmvar.h,v 1.4 2016/11/24 03:59:36 hkenken Exp $ */
/*
* Copyright (c) 2012 Genetec Corporation. All rights reserved.
* Written by Hashimoto Kenichi for Genetec Corporation.
@@ -75,7 +75,7 @@ enum imx6_clock {
uint32_t imx6_get_clock(enum imx6_clock);
int imx6_set_clock(enum imx6_clock, uint32_t);
-int imx6_pll_power(uint32_t, int);
+int imx6_pll_power(uint32_t, int, uint32_t);
uint32_t imx6_ccm_read(uint32_t);
void imx6_ccm_write(uint32_t, uint32_t);
Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.4 src/sys/arch/arm/imx/imx6_ccm.c:1.5
--- src/sys/arch/arm/imx/imx6_ccm.c:1.4 Fri Jan 9 09:50:46 2015
+++ src/sys/arch/arm/imx/imx6_ccm.c Thu Nov 24 03:59:36 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: imx6_ccm.c,v 1.4 2015/01/09 09:50:46 ryo Exp $ */
+/* $NetBSD: imx6_ccm.c,v 1.5 2016/11/24 03:59:36 hkenken Exp $ */
/*
* Copyright (c) 2010-2012, 2014 Genetec Corporation. All rights reserved.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.4 2015/01/09 09:50:46 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.5 2016/11/24 03:59:36 hkenken Exp $");
#include "opt_imx.h"
#include "opt_imx6clk.h"
@@ -851,7 +851,7 @@ imx6_get_clock(enum imx6_clock clk)
}
int
-imx6_pll_power(uint32_t pllreg, int on)
+imx6_pll_power(uint32_t pllreg, int on, uint32_t en)
{
uint32_t v;
int timeout;
@@ -861,10 +861,10 @@ imx6_pll_power(uint32_t pllreg, int on)
case CCM_ANALOG_PLL_USB2:
v = imx6_ccm_read(pllreg);
if (on) {
- v |= CCM_ANALOG_PLL_USBn_ENABLE;
+ v |= en;
v &= ~CCM_ANALOG_PLL_USBn_BYPASS;
} else {
- v &= ~CCM_ANALOG_PLL_USBn_ENABLE;
+ v &= ~en;
}
imx6_ccm_write(pllreg, v);
return 0;
@@ -885,11 +885,13 @@ imx6_pll_power(uint32_t pllreg, int on)
if (timeout <= 0)
break;
+ v |= CCM_ANALOG_PLL_ENET_ENABLE;
if (on) {
v &= ~CCM_ANALOG_PLL_ENET_BYPASS;
- v |= CCM_ANALOG_PLL_ENET_ENABLE;
+ imx6_ccm_write(pllreg, v);
+ v |= en;
} else {
- v &= ~CCM_ANALOG_PLL_ENET_ENABLE;
+ v &= ~en;
}
imx6_ccm_write(pllreg, v);
return 0;
Index: src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c
diff -u src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c:1.1 src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c:1.2
--- src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c:1.1 Thu Sep 25 05:05:28 2014
+++ src/sys/arch/evbarm/nitrogen6/nitrogen6_usb.c Thu Nov 24 03:59:36 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: nitrogen6_usb.c,v 1.1 2014/09/25 05:05:28 ryo Exp $ */
+/* $NetBSD: nitrogen6_usb.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $ */
/*
* Copyright (c) 2013 Genetec Corporation. All rights reserved.
@@ -27,7 +27,7 @@
*
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nitrogen6_usb.c,v 1.1 2014/09/25 05:05:28 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nitrogen6_usb.c,v 1.2 2016/11/24 03:59:36 hkenken Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -127,7 +127,7 @@ init_otg(struct imxehci_softc *sc)
imx6_ccm_write(USB_ANALOG_USB1_CHRG_DETECT,
USB_ANALOG_USB_CHRG_DETECT_EN_B |
USB_ANALOG_USB_CHRG_DETECT_CHK_CHRG_B);
- imx6_pll_power(CCM_ANALOG_PLL_USB1, 1);
+ imx6_pll_power(CCM_ANALOG_PLL_USB1, 1, CCM_ANALOG_PLL_USBn_ENABLE);
imx6_ccm_write(CCM_ANALOG_PLL_USB1_CLR,
CCM_ANALOG_PLL_USBn_BYPASS);
imx6_ccm_write(CCM_ANALOG_PLL_USB1_SET,
