Module Name: src
Committed By: kamil
Date: Fri Apr 14 04:43:47 UTC 2017
Modified Files:
src/sys/arch/x86/include: cpu.h
src/sys/arch/x86/x86: x86_machdep.c
Log Message:
x86: Export fpu_save, fpu_save_size, xsave_features to dedicated sysctl nodes
Add new defines:
- CPU_FPU_SAVE (15)
int: FPU Instructions layout
* to use this, CPU_OSFXSR must be true
* 0: FSAVE
* 1: FXSAVE
* 2: XSAVE
* 3: XSAVEOPT
- CPU_FPU_SAVE_SIZE (16)
int: FPU Instruction layout size
- CPU_XSAVE_FEATURES (17)
quad: FPU XSAVE features
Bump CPU_MAXID from 15 to 18.
These values were prepared originally to be exported without ASCIIZ name to
be used as handler. These values are useful to get FPU accessors in a
debugger easier to implement on x86 (PT_SETFPREG, PT_GETFPREG).
This interface handles all supported x86 targets. In the older (i386) and
less featured CPUs check first osfxsr (OS uses FXSAVE/FXRSTOR).
According to sys/arch/x86/include/cpu.h r.1.65 this was prepared to be
exported beyond simple CTL_CREATE node.
Sponsored by <The NetBSD Foundation>
To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/x86/include/cpu.h
cvs rdiff -u -r1.90 -r1.91 src/sys/arch/x86/x86/x86_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/cpu.h
diff -u src/sys/arch/x86/include/cpu.h:1.68 src/sys/arch/x86/include/cpu.h:1.69
--- src/sys/arch/x86/include/cpu.h:1.68 Sat Feb 11 14:11:24 2017
+++ src/sys/arch/x86/include/cpu.h Fri Apr 14 04:43:47 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.68 2017/02/11 14:11:24 maxv Exp $ */
+/* $NetBSD: cpu.h,v 1.69 2017/04/14 04:43:47 kamil Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
@@ -512,7 +512,17 @@ void x86_bus_space_mallocok(void);
#define CPU_TMLR_FREQUENCY 12 /* int: current frequency */
#define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */
#define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */
-#define CPU_MAXID 15 /* number of valid machdep ids */
+#define CPU_FPU_SAVE 15 /* int: FPU Instructions layout
+ * to use this, CPU_OSFXSR must be true
+ * 0: FSAVE
+ * 1: FXSAVE
+ * 2: XSAVE
+ * 3: XSAVEOPT
+ */
+#define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */
+#define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */
+
+#define CPU_MAXID 18 /* number of valid machdep ids */
/*
* Structure for CPU_DISKINFO sysctl call.
Index: src/sys/arch/x86/x86/x86_machdep.c
diff -u src/sys/arch/x86/x86/x86_machdep.c:1.90 src/sys/arch/x86/x86/x86_machdep.c:1.91
--- src/sys/arch/x86/x86/x86_machdep.c:1.90 Fri Mar 24 17:09:37 2017
+++ src/sys/arch/x86/x86/x86_machdep.c Fri Apr 14 04:43:47 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: x86_machdep.c,v 1.90 2017/03/24 17:09:37 maxv Exp $ */
+/* $NetBSD: x86_machdep.c,v 1.91 2017/04/14 04:43:47 kamil Exp $ */
/*-
* Copyright (c) 2002, 2006, 2007 YAMAMOTO Takashi,
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.90 2017/03/24 17:09:37 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.91 2017/04/14 04:43:47 kamil Exp $");
#include "opt_modular.h"
#include "opt_physmem.h"
@@ -1185,11 +1185,11 @@ SYSCTL_SETUP(sysctl_machdep_setup, "sysc
CPU_SSE2);
const_sysctl(clog, "fpu_save", CTLTYPE_INT, x86_fpu_save,
- CTL_CREATE);
+ CPU_FPU_SAVE);
const_sysctl(clog, "fpu_save_size", CTLTYPE_INT, x86_fpu_save_size,
- CTL_CREATE);
+ CPU_FPU_SAVE_SIZE);
const_sysctl(clog, "xsave_features", CTLTYPE_QUAD, x86_xsave_features,
- CTL_CREATE);
+ CPU_XSAVE_FEATURES);
#ifndef XEN
const_sysctl(clog, "biosbasemem", CTLTYPE_INT, biosbasemem,
