Module Name:    src
Committed By:   skrll
Date:           Fri May 19 07:43:31 UTC 2017

Modified Files:
        src/sys/arch/mips/ingenic: apbus.c ingenic_com.c ingenic_dme.c
            jzfb_regs.h jziic.c

Log Message:
Trailing whitespace


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/mips/ingenic/apbus.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/ingenic/ingenic_com.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/ingenic/ingenic_dme.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/mips/ingenic/jzfb_regs.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/mips/ingenic/jziic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/ingenic/apbus.c
diff -u src/sys/arch/mips/ingenic/apbus.c:1.18 src/sys/arch/mips/ingenic/apbus.c:1.19
--- src/sys/arch/mips/ingenic/apbus.c:1.18	Thu Oct  8 17:54:30 2015
+++ src/sys/arch/mips/ingenic/apbus.c	Fri May 19 07:43:31 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: apbus.c,v 1.18 2015/10/08 17:54:30 macallan Exp $ */
+/*	$NetBSD: apbus.c,v 1.19 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -25,11 +25,11 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /* catch-all for on-chip peripherals */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.18 2015/10/08 17:54:30 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.19 2017/05/19 07:43:31 skrll Exp $");
 
 #include "locators.h"
 #define	_MIPS_BUS_DMA_PRIVATE
@@ -264,7 +264,7 @@ apbus_attach(device_t parent, device_t s
 			reg &= ~adv->clk1;
 			writereg(JZ_CLKGR1, reg);
 		}
-	
+
 		(void) config_found_ia(self, "apbus", &aa, apbus_print);
 	}
 }

Index: src/sys/arch/mips/ingenic/ingenic_com.c
diff -u src/sys/arch/mips/ingenic/ingenic_com.c:1.5 src/sys/arch/mips/ingenic/ingenic_com.c:1.6
--- src/sys/arch/mips/ingenic/ingenic_com.c:1.5	Sat Jul 11 19:00:04 2015
+++ src/sys/arch/mips/ingenic/ingenic_com.c	Fri May 19 07:43:31 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: ingenic_com.c,v 1.5 2015/07/11 19:00:04 macallan Exp $ */
+/*	$NetBSD: ingenic_com.c,v 1.6 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.5 2015/07/11 19:00:04 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.6 2017/05/19 07:43:31 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -112,7 +112,7 @@ ingenic_putchar_init(void)
 		com0addr[com_lctl] = htole32(LCR_8BITS);	/* XXX */
 		com0addr[com_mcr]  = htole32(MCR_DTR|MCR_RTS);
 		com0addr[com_fifo] = htole32(
-		    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 
+		    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
 		    FIFO_TRIGGER_1 | FIFO_UART_ON);
 #if 0
 	}
@@ -149,7 +149,7 @@ void
 ingenic_com_cnattach(void)
 {
 	int i;
-	
+
 	bus_space_map(apbus_memt, JZ_UART0, 0x100, 0, &regh);
 	cons_com = JZ_UART0;
 	memset(&regs, 0, sizeof(regs));

Index: src/sys/arch/mips/ingenic/ingenic_dme.c
diff -u src/sys/arch/mips/ingenic/ingenic_dme.c:1.2 src/sys/arch/mips/ingenic/ingenic_dme.c:1.3
--- src/sys/arch/mips/ingenic/ingenic_dme.c:1.2	Thu Oct  8 17:55:58 2015
+++ src/sys/arch/mips/ingenic/ingenic_dme.c	Fri May 19 07:43:31 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: ingenic_dme.c,v 1.2 2015/10/08 17:55:58 macallan Exp $ */
+/*	$NetBSD: ingenic_dme.c,v 1.3 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ingenic_dme.c,v 1.2 2015/10/08 17:55:58 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ingenic_dme.c,v 1.3 2017/05/19 07:43:31 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -160,7 +160,7 @@ fail:
 static int
 ingenic_dme_intr(void *arg)
 {
-	uint32_t reg;	
+	uint32_t reg;
 	int ret = 0;
 
 	/* see if it's us */

Index: src/sys/arch/mips/ingenic/jzfb_regs.h
diff -u src/sys/arch/mips/ingenic/jzfb_regs.h:1.1 src/sys/arch/mips/ingenic/jzfb_regs.h:1.2
--- src/sys/arch/mips/ingenic/jzfb_regs.h:1.1	Thu Apr  7 01:00:05 2016
+++ src/sys/arch/mips/ingenic/jzfb_regs.h	Fri May 19 07:43:31 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: jzfb_regs.h,v 1.1 2016/04/07 01:00:05 macallan Exp $ */
+/*	$NetBSD: jzfb_regs.h,v 1.2 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Michael Lorenz
@@ -86,4 +86,4 @@
 #define JZ_LCDENH_GAMMA		0x0800
 #define JZ_LCDENH_VEE		0x1000
 
-#endif /* JZFB_REGS_H */
\ No newline at end of file
+#endif /* JZFB_REGS_H */

Index: src/sys/arch/mips/ingenic/jziic.c
diff -u src/sys/arch/mips/ingenic/jziic.c:1.3 src/sys/arch/mips/ingenic/jziic.c:1.4
--- src/sys/arch/mips/ingenic/jziic.c:1.3	Mon Dec 14 23:21:23 2015
+++ src/sys/arch/mips/ingenic/jziic.c	Fri May 19 07:43:31 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: jziic.c,v 1.3 2015/12/14 23:21:23 macallan Exp $ */
+/*	$NetBSD: jziic.c,v 1.4 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Michael Lorenz
@@ -27,12 +27,12 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: jziic.c,v 1.3 2015/12/14 23:21:23 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: jziic.c,v 1.4 2017/05/19 07:43:31 skrll Exp $");
 
 /*
  * a preliminary driver for JZ4780's on-chip SMBus controllers
  * - needs more error handling and interrupt support
- * - transfers can't be more than the chip's FIFO, supposedly 16 bytes per 
+ * - transfers can't be more than the chip's FIFO, supposedly 16 bytes per
  *   direction
  * so, good enough for RTCs but not much else yet
  */
@@ -259,7 +259,7 @@ jziic_wait(struct jziic_softc *sc)
 		delay(100);
 		reg = bus_space_read_4(sc->sc_memt, sc->sc_memh, JZ_SMBST);
 		bail--;
-	}  
+	}
 	return ((reg & JZ_MSTACT) == 0);
 }
 
@@ -396,7 +396,7 @@ jziic_i2c_exec_poll(struct jziic_softc *
 				  JZ_SMBST) & JZ_RFNE) == 0) && (bail > 0)) {
 				bail--;
 				delay(100);
-			} 
+			}
 			if (bail == 0) {
 				ret = -1;
 				goto bork;
@@ -536,7 +536,7 @@ jziic_i2c_exec_intr(struct jziic_softc *
 
 		bail = 10 * sc->sc_buflen; /* 10 ticks per byte should be ok */
 		while ((sc->sc_bufptr < sc->sc_buflen) && (bail > 0)) {
-			cv_timedwait(&sc->sc_ping, &sc->sc_cvlock, 1); 
+			cv_timedwait(&sc->sc_ping, &sc->sc_cvlock, 1);
 			if (sc->sc_abort) {
 				/* we received an abort interrupt -> bailout */
 		  	  	DPRINTF("rx abort: %x\n", sc->sc_abort);
@@ -589,10 +589,10 @@ jziic_intr(void *cookie)
 				    JZ_SMBINTM,
 				    JZ_TXABT | JZ_RXFL);
 			}
-		} else {		
+		} else {
 			rstat = bus_space_read_4(sc->sc_memt, sc->sc_memh,
 			    JZ_SMBST);
-			while ((rstat & JZ_TFNF) && 
+			while ((rstat & JZ_TFNF) &&
 			         (sc->sc_cmdptr < sc->sc_cmdlen)) {
 				data = *sc->sc_cmd;
 				sc->sc_cmd++;
@@ -608,7 +608,7 @@ jziic_intr(void *cookie)
 				bus_space_write_4(sc->sc_memt, sc->sc_memh,
 				    JZ_SMBINTM, JZ_TXABT);
 			}
-		}			
+		}
 	}
 	if (stat & JZ_RXFL) {
 		rstat = bus_space_read_4(sc->sc_memt, sc->sc_memh, JZ_SMBST);

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