Module Name: src
Committed By: chs
Date: Fri Jul 7 00:34:09 UTC 2017
Modified Files:
src/sys/arch/arm/arm32: exception.S
src/sys/arch/arm/include/arm32: frame.h
Log Message:
split PUSHFRAMEINSVC into two pieces so that we can insert some additional
instructions in the middle in undefinedinstruction_bounce, namely to add
some additional space on the stack before the trapframe for undefineds from
SVC mode. this extra space allows dtrace to emulate a "push" instruction.
the initial version was from me and some improvements were from nick.
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/arm32/exception.S
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/arm/include/arm32/frame.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/exception.S
diff -u src/sys/arch/arm/arm32/exception.S:1.23 src/sys/arch/arm/arm32/exception.S:1.24
--- src/sys/arch/arm/arm32/exception.S:1.23 Sun Jun 21 15:00:06 2015
+++ src/sys/arch/arm/arm32/exception.S Fri Jul 7 00:34:09 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: exception.S,v 1.23 2015/06/21 15:00:06 matt Exp $ */
+/* $NetBSD: exception.S,v 1.24 2017/07/07 00:34:09 chs Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -51,7 +51,7 @@
#include <arm/locore.h>
- RCSID("$NetBSD: exception.S,v 1.23 2015/06/21 15:00:06 matt Exp $")
+ RCSID("$NetBSD: exception.S,v 1.24 2017/07/07 00:34:09 chs Exp $")
.text
.align 0
@@ -258,7 +258,9 @@ ASEND(undefined_entry)
*/
ENTRY_NP(undefinedinstruction_bounce)
- PUSHFRAMEINSVC
+ PUSHXXXREGSANDSWITCH
+ PUSHDTRACEGAP
+ PUSHTRAPFRAME(r2)
ENABLE_ALIGNMENT_FAULTS
mov r0, sp
Index: src/sys/arch/arm/include/arm32/frame.h
diff -u src/sys/arch/arm/include/arm32/frame.h:1.43 src/sys/arch/arm/include/arm32/frame.h:1.44
--- src/sys/arch/arm/include/arm32/frame.h:1.43 Thu Jun 22 08:44:21 2017
+++ src/sys/arch/arm/include/arm32/frame.h Fri Jul 7 00:34:09 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.43 2017/06/22 08:44:21 skrll Exp $ */
+/* $NetBSD: frame.h,v 1.44 2017/07/07 00:34:09 chs Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -95,6 +95,7 @@ void validate_trapframe(trapframe_t *, i
#include "opt_cpuoptions.h"
#include "opt_arm_debug.h"
#include "opt_cputypes.h"
+#include "opt_dtrace.h"
#include <arm/locore.h>
@@ -440,13 +441,25 @@ LOCK_CAS_DEBUG_LOCALS
msr cpsr_c, tmp /* Punch into SVC mode */
#endif
-#define PUSHFRAMEINSVC \
+#define PUSHXXXREGSANDSWITCH \
stmdb sp, {r0-r3}; /* Save 4 registers */ \
mov r0, lr; /* Save xxx32 r14 */ \
mov r1, sp; /* Save xxx32 sp */ \
mrs r3, spsr; /* Save xxx32 spsr */ \
- SET_CPSR_MODE(r2, PSR_SVC32_MODE); \
- bic r2, sp, #7; /* Align new SVC sp */ \
+ SET_CPSR_MODE(r2, PSR_SVC32_MODE)
+
+#ifdef KDTRACE_HOOKS
+#define PUSHDTRACEGAP \
+ and r2, r3, #(PSR_MODE); \
+ cmp r2, #(PSR_SVC32_MODE); /* were we in SVC mode? */ \
+ mov r2, sp; \
+ subeq r2, r2, #(4 * 16); /* if so, leave a gap for dtrace */
+#else
+#define PUSHDTRACEGAP /* nothing */
+#endif
+
+#define PUSHTRAPFRAME(rX) \
+ bic r2, rX, #7; /* Align new SVC sp */ \
str r0, [r2, #-4]!; /* Push return address */ \
stmdb r2!, {sp, lr}; /* Push SVC sp, lr */ \
mov sp, r2; /* Keep stack aligned */ \
@@ -458,6 +471,10 @@ LOCK_CAS_DEBUG_LOCALS
mrs r0, spsr; /* Get the SPSR */ \
str r0, [sp, #-TF_R0]! /* Push the SPSR onto the stack */
+#define PUSHFRAMEINSVC \
+ PUSHXXXREGSANDSWITCH; \
+ PUSHTRAPFRAME(sp)
+
/*
* PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
* in SVC32 mode and restore the saved processor mode and PC.
