Module Name: src
Committed By: jmcneill
Date: Thu Jul 20 01:46:15 UTC 2017
Modified Files:
src/sys/arch/arm/nvidia: tegra_platform.c tegra_pmc.c tegra_soc.c
tegra_soctherm.c tegra_var.h
Log Message:
Get rid of tegra_chip_id/tegra_chip_name and rely on FDT for this info.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/nvidia/tegra_platform.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/nvidia/tegra_pmc.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/nvidia/tegra_soc.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/nvidia/tegra_soctherm.c
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/nvidia/tegra_var.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/nvidia/tegra_platform.c
diff -u src/sys/arch/arm/nvidia/tegra_platform.c:1.6 src/sys/arch/arm/nvidia/tegra_platform.c:1.7
--- src/sys/arch/arm/nvidia/tegra_platform.c:1.6 Fri Jun 2 13:53:29 2017
+++ src/sys/arch/arm/nvidia/tegra_platform.c Thu Jul 20 01:46:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_platform.c,v 1.6 2017/06/02 13:53:29 jmcneill Exp $ */
+/* $NetBSD: tegra_platform.c,v 1.7 2017/07/20 01:46:15 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared D. McNeill <jmcne...@invisible.ca>
@@ -33,7 +33,7 @@
#include "ukbd.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_platform.c,v 1.6 2017/06/02 13:53:29 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_platform.c,v 1.7 2017/07/20 01:46:15 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -97,9 +97,19 @@ tegra_platform_devmap(void)
}
static void
-tegra_platform_bootstrap(void)
+tegra124_platform_bootstrap(void)
{
tegra_bootstrap();
+
+ tegra124_mpinit();
+}
+
+static void
+tegra210_platform_bootstrap(void)
+{
+ tegra_bootstrap();
+
+ tegra210_mpinit();
}
static void
@@ -196,9 +206,22 @@ tegra_platform_uart_freq(void)
return PLLP_OUT0_FREQ;
}
-static const struct arm_platform tegra_platform = {
+static const struct arm_platform tegra124_platform = {
+ .devmap = tegra_platform_devmap,
+ .bootstrap = tegra124_platform_bootstrap,
+ .init_attach_args = tegra_platform_init_attach_args,
+ .early_putchar = tegra_platform_early_putchar,
+ .device_register = tegra_platform_device_register,
+ .reset = tegra_platform_reset,
+ .delay = tegra_platform_delay,
+ .uart_freq = tegra_platform_uart_freq,
+};
+
+ARM_PLATFORM(tegra124, "nvidia,tegra124", &tegra124_platform);
+
+static const struct arm_platform tegra210_platform = {
.devmap = tegra_platform_devmap,
- .bootstrap = tegra_platform_bootstrap,
+ .bootstrap = tegra210_platform_bootstrap,
.init_attach_args = tegra_platform_init_attach_args,
.early_putchar = tegra_platform_early_putchar,
.device_register = tegra_platform_device_register,
@@ -207,5 +230,4 @@ static const struct arm_platform tegra_p
.uart_freq = tegra_platform_uart_freq,
};
-ARM_PLATFORM(tegra124, "nvidia,tegra124", &tegra_platform);
-ARM_PLATFORM(tegra210, "nvidia,tegra210", &tegra_platform);
+ARM_PLATFORM(tegra210, "nvidia,tegra210", &tegra210_platform);
Index: src/sys/arch/arm/nvidia/tegra_pmc.c
diff -u src/sys/arch/arm/nvidia/tegra_pmc.c:1.10 src/sys/arch/arm/nvidia/tegra_pmc.c:1.11
--- src/sys/arch/arm/nvidia/tegra_pmc.c:1.10 Thu May 25 23:52:10 2017
+++ src/sys/arch/arm/nvidia/tegra_pmc.c Thu Jul 20 01:46:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_pmc.c,v 1.10 2017/05/25 23:52:10 jmcneill Exp $ */
+/* $NetBSD: tegra_pmc.c,v 1.11 2017/07/20 01:46:15 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_pmc.c,v 1.10 2017/05/25 23:52:10 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_pmc.c,v 1.11 2017/07/20 01:46:15 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -174,12 +174,8 @@ tegra_pmc_remove_clamping(u_int partid)
* On Tegra124 and later, the GPU power clamping is
* controlled by a separate register
*/
- switch (tegra_chip_id()) {
- case CHIP_ID_TEGRA124:
- case CHIP_ID_TEGRA210:
- bus_space_write_4(bst, bsh, PMC_GPU_RG_CNTRL_REG, 0);
- return;
- }
+ bus_space_write_4(bst, bsh, PMC_GPU_RG_CNTRL_REG, 0);
+ return;
}
bus_space_write_4(bst, bsh, PMC_REMOVE_CLAMPING_CMD_0_REG,
Index: src/sys/arch/arm/nvidia/tegra_soc.c
diff -u src/sys/arch/arm/nvidia/tegra_soc.c:1.13 src/sys/arch/arm/nvidia/tegra_soc.c:1.14
--- src/sys/arch/arm/nvidia/tegra_soc.c:1.13 Sun May 28 23:32:14 2017
+++ src/sys/arch/arm/nvidia/tegra_soc.c Thu Jul 20 01:46:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_soc.c,v 1.13 2017/05/28 23:32:14 jmcneill Exp $ */
+/* $NetBSD: tegra_soc.c,v 1.14 2017/07/20 01:46:15 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -30,7 +30,7 @@
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_soc.c,v 1.13 2017/05/28 23:32:14 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_soc.c,v 1.14 2017/07/20 01:46:15 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -52,8 +52,6 @@ bus_space_handle_t tegra_ppsb_bsh;
bus_space_handle_t tegra_apb_bsh;
bus_space_handle_t tegra_ahb_a2_bsh;
-static void tegra_mpinit(void);
-
void
tegra_bootstrap(void)
{
@@ -73,54 +71,4 @@ tegra_bootstrap(void)
TEGRA_AHB_A2_BASE, TEGRA_AHB_A2_SIZE, 0,
&tegra_ahb_a2_bsh) != 0)
panic("couldn't map AHB A2");
-
- tegra_mpinit();
-}
-
-static void
-tegra_mpinit(void)
-{
-#if defined(MULTIPROCESSOR)
- switch (tegra_chip_id()) {
-#ifdef SOC_TEGRA124
- case CHIP_ID_TEGRA124:
- tegra124_mpinit();
- break;
-#endif
-#ifdef SOC_TEGRA210
- case CHIP_ID_TEGRA210:
- tegra210_mpinit();
- break;
-#endif
- default:
- panic("Unsupported SOC ID %#x", tegra_chip_id());
- }
-#endif
-}
-
-u_int
-tegra_chip_id(void)
-{
- static u_int chip_id = 0;
-
- if (!chip_id) {
- const bus_space_tag_t bst = &armv7_generic_bs_tag;
- const bus_space_handle_t bsh = tegra_apb_bsh;
- const uint32_t v = bus_space_read_4(bst, bsh,
- APB_MISC_GP_HIDREV_0_REG);
- chip_id = __SHIFTOUT(v, APB_MISC_GP_HIDREV_0_CHIPID);
- }
-
- return chip_id;
-}
-
-const char *
-tegra_chip_name(void)
-{
- switch (tegra_chip_id()) {
- case CHIP_ID_TEGRA124: return "Tegra K1 (T124)";
- case CHIP_ID_TEGRA132: return "Tegra K1 (T132)";
- case CHIP_ID_TEGRA210: return "Tegra X1 (T210)";
- default: return "Unknown Tegra SoC";
- }
}
Index: src/sys/arch/arm/nvidia/tegra_soctherm.c
diff -u src/sys/arch/arm/nvidia/tegra_soctherm.c:1.4 src/sys/arch/arm/nvidia/tegra_soctherm.c:1.5
--- src/sys/arch/arm/nvidia/tegra_soctherm.c:1.4 Sun Apr 16 12:28:21 2017
+++ src/sys/arch/arm/nvidia/tegra_soctherm.c Thu Jul 20 01:46:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_soctherm.c,v 1.4 2017/04/16 12:28:21 jmcneill Exp $ */
+/* $NetBSD: tegra_soctherm.c,v 1.5 2017/07/20 01:46:15 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_soctherm.c,v 1.4 2017/04/16 12:28:21 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_soctherm.c,v 1.5 2017/07/20 01:46:15 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -159,13 +159,17 @@ CFATTACH_DECL_NEW(tegra_soctherm, sizeof
#define SENSOR_SET_CLEAR(sc, s, reg, set, clr) \
tegra_reg_set_clear((sc)->sc_bst, (sc)->sc_bsh, (s)->s_base + (reg), (set), (clr))
+static const struct of_compat_data compat_data[] = {
+ { "nvidia,tegra124-soctherm", (uintptr_t)&tegra124_soctherm_config },
+ { NULL }
+};
+
static int
tegra_soctherm_match(device_t parent, cfdata_t cf, void *aux)
{
- const char * const compatible[] = { "nvidia,tegra124-soctherm", NULL };
struct fdt_attach_args * const faa = aux;
- return of_match_compatible(faa->faa_phandle, compatible);
+ return of_match_compat_data(faa->faa_phandle, compat_data);
}
static void
@@ -173,25 +177,26 @@ tegra_soctherm_attach(device_t parent, d
{
struct tegra_soctherm_softc * const sc = device_private(self);
struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
bus_addr_t addr;
bus_size_t size;
int error;
- if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
+ if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
aprint_error(": couldn't get registers\n");
return;
}
- sc->sc_clk_tsensor = fdtbus_clock_get(faa->faa_phandle, "tsensor");
+ sc->sc_clk_tsensor = fdtbus_clock_get(phandle, "tsensor");
if (sc->sc_clk_tsensor == NULL) {
aprint_error(": couldn't get clock tsensor\n");
return;
}
- sc->sc_clk_soctherm = fdtbus_clock_get(faa->faa_phandle, "soctherm");
+ sc->sc_clk_soctherm = fdtbus_clock_get(phandle, "soctherm");
if (sc->sc_clk_soctherm == NULL) {
aprint_error(": couldn't get clock soctherm\n");
return;
}
- sc->sc_rst_soctherm = fdtbus_reset_get(faa->faa_phandle, "soctherm");
+ sc->sc_rst_soctherm = fdtbus_reset_get(phandle, "soctherm");
if (sc->sc_rst_soctherm == NULL) {
aprint_error(": couldn't get reset soctherm\n");
return;
@@ -208,12 +213,9 @@ tegra_soctherm_attach(device_t parent, d
aprint_naive("\n");
aprint_normal(": SOC_THERM\n");
- if (tegra_chip_id() == CHIP_ID_TEGRA124) {
- sc->sc_config = &tegra124_soctherm_config;
- }
-
+ sc->sc_config = (const void *)of_search_compatible(phandle, compat_data);
if (sc->sc_config == NULL) {
- aprint_error_dev(self, "unsupported chip ID\n");
+ aprint_error_dev(self, "unsupported SoC\n");
return;
}
Index: src/sys/arch/arm/nvidia/tegra_var.h
diff -u src/sys/arch/arm/nvidia/tegra_var.h:1.38 src/sys/arch/arm/nvidia/tegra_var.h:1.39
--- src/sys/arch/arm/nvidia/tegra_var.h:1.38 Fri Jun 2 00:16:27 2017
+++ src/sys/arch/arm/nvidia/tegra_var.h Thu Jul 20 01:46:15 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_var.h,v 1.38 2017/06/02 00:16:27 jmcneill Exp $ */
+/* $NetBSD: tegra_var.h,v 1.39 2017/07/20 01:46:15 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -40,15 +40,6 @@ extern struct bus_space armv7_generic_a4
extern bus_space_handle_t tegra_ppsb_bsh;
extern bus_space_handle_t tegra_apb_bsh;
-#define CHIP_ID_TEGRA20 0x20
-#define CHIP_ID_TEGRA30 0x30
-#define CHIP_ID_TEGRA114 0x35
-#define CHIP_ID_TEGRA124 0x40
-#define CHIP_ID_TEGRA132 0x13
-#define CHIP_ID_TEGRA210 0x21
-
-u_int tegra_chip_id(void);
-const char *tegra_chip_name(void);
void tegra_bootstrap(void);
struct tegra_gpio_pin;
